Dielectric Moat Passivation for Dense Wafer Singulation
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Solution Overview
Problem
Existing passivation techniques for semiconductor device moats, such as photo-glass passivation (PGP), suffer from defects, damage susceptibility, and excessive wafer area consumption, leading to leakage currents and inefficient device spacing.
Innovation Solution
Employing a dielectric film, like an oxide-nitride film, to coat moat surfaces provides effective passivation with reduced area consumption, enabling complete coverage and protection against electrical overstress, allowing for smaller device spacing and improved manufacturing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If photo-glass passivation (PGP) is used to form passivation in wafer areas including moats, then leakage currents are minimized or eliminated, but wafer processing difficulties are introduced and valuable surface area is consumed
Solution Approach 1:
The patent changes the material parameter from photo-glass to dielectric film, which fundamentally alters the passivation mechanism. The dielectric film provides equivalent electrical isolation performance without the processing complications of photo-glass, eliminating the need for complex PGP deposition and curing steps while maintaining leakage current suppression
Solution Approach 2:
The patent extracts the essential function of photo-glass passivation (electrical isolation and leakage prevention) and separates it from the problematic material properties. By using a simple dielectric film instead of photo-glass, the solution retains the passivation function while removing the processing difficulties associated with photo-glass application and removal
2Reliability
If photo-glass passivation is used to cover moat areas, then passivation is provided, but valuable surface area on the wafer is consumed
Solution Approach 1:
The patent employs a thin dielectric film to provide passivation coverage. This thin film approach consumes minimal vertical and lateral space compared to photo-glass, allowing the passivation layer to conform to moat structures without requiring excessive wafer surface area, thereby enabling higher device density
3Reliability
If larger spacing is provided between devices for passivation, then leakage currents are reduced, but device density per wafer decreases
Solution Approach 1:
The patent applies passivation locally at the moat interfaces and critical leakage paths using a dielectric film, rather than requiring uniform large spacing between all devices. This localized approach provides effective leakage current control precisely where needed at the moat boundaries, allowing devices to be positioned closer together while maintaining reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The dielectric film offers superior passivation, reduces EOS failures, and allows for more devices per wafer by minimizing space requirements, enhancing manufacturing efficiency and reliability.
Implementation Method 1
a dielectric film covering the sidewall and a first portion of the surface
Data Source
AI summary
Techniques are described for the use of moats for isolating and singulating semiconductor devices formed on a wafer. Described techniques use dielectric films, such as an oxide-nitride film, to coat moat surfaces and provide passivation. The dielectric films may form a junction with a metal contact layer, to reduce electrical overstress that may otherwise occur in the resulting semiconductor devices. To ensure coverage of the moat surfaces, spray coating of a positive photoresist may be used.