Self-Aligned Conductive Contacts via Dielectric Pillar Isolation
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Solution Overview
Problem
Existing semiconductor fabrication techniques face challenges in forming conductive contacts between source/drain regions due to voids in sacrificial interlayer dielectric materials and lack of etch selectivity, leading to poor contact structures and electrical shorts in smaller feature sizes.
Innovation Solution
A method involving the formation of a sacrificial layer, trench etching, and deposition of a dielectric pillar between source/drain regions, followed by replacement of temporary gate structures with functional gates and removal of fill layers, ensuring precise etch selectivity and avoiding void-related issues.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If sacrificial interlayer dielectric materials such as amorphous silicon are used, then conductive contacts can be formed, but voids are created during deposition that trap subsequent dielectric materials and prevent complete removal, resulting in poor contact structures
Solution Approach 1:
The patent extracts and removes the problematic sacrificial interlayer dielectric material completely after forming the conductive contact plug. By using a sacrificial layer that can be fully removed (such as through selective etching or sacrificial material decomposition), the void formation issue is eliminated while still enabling contact formation between metal layers and active devices.
Solution Approach 2:
The patent introduces a different sacrificial material layer that serves as an intermediary during the contact formation process. This sacrificial layer is specifically chosen to be removable without creating voids and without damaging surrounding structures, mediating between the need for contact formation and the need for clean, void-free final structure.
2Reliability
If etchants with high selectivity to interlayer dielectric material are used, then complete removal of the dielectric is achieved, but other portions of the circuit structure that must remain intact are partially removed
Solution Approach 1:
The patent applies local quality by using selective etching processes that target specific materials at specific locations. Different etchants or etch conditions are applied to remove the sacrificial layer or interlayer dielectric in contact regions while preserving the surrounding circuit structure. This localized approach allows complete removal where needed while protecting areas that must remain intact.
Solution Approach 2:
The patent changes etch parameters such as etchant composition, temperature, pressure, or time to achieve selective removal of dielectric materials. By adjusting these parameters, the etching process becomes selective to the sacrificial layer or interlayer dielectric while having minimal impact on other circuit structures, resolving the contradiction between complete removal and structure preservation.
3Adaptability or versatility
If conventional fabrication processes are used for larger feature sizes, then conductive contacts can be formed, but these processes break down for smaller feature sizes requiring new processes
Solution Approach 1:
The patent performs preliminary actions by forming the conductive contact plug and removing the sacrificial layer before forming the final metal interconnect layer. This sequence ensures that the contact structure is properly established and free of voids before subsequent processing steps, making the process adaptable to smaller feature sizes where void formation would be more problematic.
Solution Approach 2:
The patent segments the contact formation process into distinct steps: forming the conductive plug, removing the sacrificial layer, and then forming the metal interconnect. This segmentation allows each step to be optimized independently for different feature sizes, improving adaptability while managing overall process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the formation of reliable conductive contacts by maintaining etch selectivity and preventing voids from affecting the contact structure, ensuring proper functioning of integrated circuits at smaller feature sizes.
Implementation Method 1
A trench is etched in the sacrificial layer between the first source/drain region and the second source/drain region
Implementation Method 2
a dielectric material is deposited in the trench to form a dielectric pillar
Data Source
AI summary
Methods of fabricating structures that include contacts coupled with a source/drain region of a field-effect transistor. Source/drain regions are formed adjacent to a temporary gate structure. In one process, a sacrificial layer is disposed over the source/drain regions and a dielectric pillar is formed in the sacrificial layer between the source/drain regions, followed by deposition of a fill material, replacement of the temporary gate structure with a functional gate structure, and removal of the fill material. In another process, the fill material is formed first and the temporary gate structure is replaced by a functional gate structure; following removal of the fill material, a sacrificial layer is disposed over the source/drain regions and a dielectric pillar is formed in the sacrificial layer between the source/drain regions. A conductive layer having separate portions contacting the separate source/drain regions is formed, with the dielectric pillar separating the portions of the conductive layer.