Dielectric Pillar Structure With Opposite Charges for CMOS Electrostatics
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Solution Overview
Problem
Current semiconductor processing forms a singular dielectric pillar between nFET and pFET regions using dielectric material with a fixed positive charge, which weakens the electrostatics of the nFET region.
Innovation Solution
Formation of a dielectric pillar structure using two or more dielectric materials with oppositely charged fixed charges next to the nFET and pFET regions, respectively, to independently and simultaneously improve the electrostatics of both regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dielectric material with fixed positive charge is used in the dielectric pillar, then the pFET device performance is improved, but harmful leakage current increases in the nFET device
Solution Approach 1:
The invention segments the dielectric structure into multiple pillars with differentiated charge configurations. Pillars positioned to influence the pFET region contain positive fixed charges to enhance pFET performance, while separate pillars positioned to influence the nFET region contain negative fixed charges to counteract harmful positive charges and reduce leakage current. This segmentation allows independent optimization of charge effects for each transistor type.
Solution Approach 2:
The invention implements local quality by assigning different charge polarities to dielectric pillars based on their spatial relationship to specific transistor regions. Dielectric pillars in the vicinity of the pFET are engineered with positive fixed charges to improve pFET electrostatics and performance, while dielectric pillars near the nFET are engineered with negative fixed charges to locally counteract harmful positive charge effects and suppress leakage current generation in the nFET region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the electrostatics of both nFET and pFET regions, improving their performance by using dielectric materials with opposite charge polarities to counteract the negative effects of positive fixed charges in the singular dielectric pillar.
Implementation Method 1
dielectric materials with oppositely charged fixed charges next to the nFET and pFET regions, respectively, to independently and simultaneously improve the electrostatics of both regions
Data Source
AI summary
A semiconductor structure includes a first transistor device, a second transistor device, and a dielectric pillar structure disposed between the first transistor device and the second transistor device. The dielectric pillar structure includes a first dielectric pillar adjacent the first transistor device and a second dielectric pillar adjacent the second transistor device.