Semiconductor Dielectric Planarization With Sidewall-Supported CMP
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods struggle to efficiently planarize semiconductor device surfaces with protruding features, leading to potential damage and defects that can cause short circuits and affect device performance and yield.
Innovation Solution
A method involving the formation of a sidewall structure on a first dielectric layer with a harder second dielectric layer to support it, followed by chemical mechanical polishing (CMP) to achieve planarity, reducing polishing area and preventing structural damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Shape
If conventional planarization methods are used on semiconductor devices with protruding features, then the surface can be flattened, but the surface of the dielectric layer is damaged (dents or scratches are formed)
Solution Approach 1:
A sidewall structure is formed on the protruding portion of the first dielectric layer before planarization. This preliminary structural preparation provides support to the protruding portion during the subsequent CMP process, preventing surface damage while enabling effective planarization.
Solution Approach 2:
The sidewall structure acts as an intermediary element between the protruding first dielectric layer and the polishing pad during CMP. It mediates the planarization process by providing mechanical support and distributing polishing forces, thereby preventing direct damage to the dielectric layer surface.
2Shape
If the surface of the dielectric layer is damaged during planarization, then planarization can be achieved, but metal material fills in the dents or scratches causing short circuits
Solution Approach 1:
The sidewall structure is formed in advance to prevent surface damage before metal interconnection processes occur. By preventing dents and scratches during planarization, the subsequent metal filling process can proceed without creating short circuit bridges between different metal wires.
3Device complexity
If the protruding portion is directly planarized without support structure, then the process is simple, but the surface damage risk increases
Solution Approach 1:
The sidewall structure formation is performed as a preliminary step before planarization. While this adds one process step, it significantly reduces surface damage risk and prevents costly rework, thereby improving overall process reliability and yield.
Solution Approach 2:
The planarization process is segmented into two distinct stages: first forming the sidewall structure on the protruding portion, then performing CMP to remove both the sidewall structure and planarize the first dielectric layer. This segmentation allows for controlled planarization with reduced surface damage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances the feasibility and efficiency of planarization, reducing the risk of surface damage and improving the yield and performance of semiconductor devices.
Implementation Method 1
A hardness of the second dielectric layer is greater than a hardness of the first dielectric layer
Implementation Method 2
The second dielectric layer and the sidewall structure are completely removed to planarize the first dielectric layer
Data Source
AI summary
A method for planarizing a surface of a semiconductor device includes steps as follows. A substrate is provided. A component is disposed on the substrate. A first dielectric layer is formed to cover the component. The first dielectric layer includes a protruding portion corresponding to the component. A portion of the protruding portion is etched to form a sidewall structure. A second dielectric layer is formed to cover the first dielectric layer. A hardness of the second dielectric layer is greater than a hardness of the first dielectric layer. The second dielectric layer and the sidewall structure are completely removed to planarize the first dielectric layer.