Dielectric Platform With Sealed Voids For Parasitic Capacitance Reduction

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Solution Overview

Problem

In high-frequency or RF applications, passive devices integrated with conductive substrates suffer from low quality factors and reduced operational frequencies due to parasitic capacitive coupling, necessitating semiconductor structures with reduced parasitic capacitances and increased isolation.

Innovation Solution

A semiconductor structure featuring a dielectric platform with sealed voids and dielectric materials, fabricated using orientation-dependent etching to minimize dielectric constant and parasitic capacitance, providing electrical isolation and increased operational frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If passive devices are formed on conductive substrates, then integration is achieved, but parasitic capacitive coupling increases and quality factor decreases

Engineering Contradiction:

Improveintegration of passive devicesVSAvoidquality factor of passive devices

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

A dielectric platform is introduced as an intermediary layer between the conductive substrate and the passive devices. This dielectric platform with sealed voids acts as a mediator that reduces parasitic capacitive coupling while maintaining the integration benefit, thereby improving the quality factor of passive devices without sacrificing integration capability.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Productivity

If passive devices are formed close to conductive substrate, then device density increases, but operational frequency is reduced due to parasitic capacitance

Engineering Contradiction:

Improvedevice densityVSAvoidoperational frequency

Core Design Contradiction:

ProductivityVSSpeed

Solution Approach 1:

The dielectric platform serves as an intermediary that enables passive devices to be positioned close to the conductive substrate while maintaining high operational frequencies. The sealed voids within the dielectric platform minimize parasitic capacitance, allowing high device density without the usual penalty of reduced operational frequency.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If dielectric constant is reduced to minimize parasitic capacitance, then parasitic capacitance decreases, but dielectric material selection and fabrication complexity increase

Engineering Contradiction:

Improveparasitic capacitance reductionVSAvoidfabrication process complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The dielectric platform incorporates sealed voids that create a porous structure with reduced effective dielectric constant. This approach minimizes parasitic capacitance while using standard semiconductor fabrication processes, avoiding the need for exotic dielectric materials or overly complex fabrication sequences.

Inventive Principle:

Principle #31Porous materials

Solution Approach 2:

The dielectric platform is formed as a composite structure combining dielectric material with sealed voids. This composite approach achieves the desired low effective dielectric constant for minimizing parasitic capacitance while remaining compatible with existing semiconductor manufacturing capabilities.

Inventive Principle:

Principle #40Composite materials

4Reliability

If isolation between regions is increased, then parasitic capacitance decreases, but structural complexity and manufacturing difficulty increase

Engineering Contradiction:

Improveelectrical isolationVSAvoidmanufacturing difficulty

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The dielectric platform is formed as a segmented structure with sealed voids that provide electrical isolation between different regions. This segmentation approach achieves effective isolation while using standard photolithography and etching processes, avoiding the need for complex multi-layer isolation structures.

Inventive Principle:

Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The dielectric platform reduces parasitic capacitance, enhances the quality factor of passive devices, and increases operational frequencies while maintaining structural integrity and reducing thermal stress.

Implementation Method 1

An embedded dielectric platform may be formed in a semiconductor substrate. The dielectric platform may have a first portion below a surface of the semiconductor substrate and a second portion above the surface of the semiconductor substrate.

Methodology Applied

Scientific EffectOrientation-dependent etching: Anisotropy

Data Source

PatentUS8133794B2Semiconductor structure and method of manufacture

Publication Date: 2012.03.13 XENOGENIC DEVELOPMENT LIMITED LIABILITY COMPANY

AI summary

In various embodiments, semiconductor structures and methods to manufacture these structures are disclosed. In one embodiment, a method includes removing a portion of a semiconductor material using an orientation-dependent etch to form a first cavity, a second cavity, wherein the first cavity is isolated from the second cavity, a first protrusion is between the first cavity and the second cavity, and the semiconductor material comprises silicon. The method further includes performing a thermal oxidation to convert a portion of the silicon of the semiconductor material to silicon dioxide and forming a first dielectric material over the first cavity, over the second cavity, over at least a portion of the semiconductor material, and over at least a portion of the first protrusion. Other embodiments are described and claimed.