Dielectric Reflow Boundary Control for Nanosheet FET Etching
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Solution Overview
Problem
In the fabrication of integrated circuits, particularly for advanced transistors like nanosheet transistors, there is a challenge in accurately controlling the boundary between n-type and p-type field-effect transistors (FETs) due to scaling issues, which can lead to material removal from blocked regions during etching.
Innovation Solution
A dielectric reflow technique is employed to enhance boundary control by depositing a first layer on transistor regions, forming a dielectric layer to protect one region while exposing the other, and then reflowing the dielectric layer to extend its coverage beyond the initial boundary, thereby protecting the underlying work function material during etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a dielectric layer is formed to protect one transistor region, then boundary protection is improved, but the dielectric layer can be undercut during etching due to scaling issues
Solution Approach 1:
The dielectric layer is reflowed before the etching process to extend its coverage beyond the initial boundary. This preliminary action ensures that when etching occurs, the dielectric layer already has sufficient overhang to prevent undercutting, thus maintaining both boundary precision and layer integrity
Solution Approach 2:
The dielectric layer undergoes a parameter change through thermal reflow processing, which alters its physical state and causes it to flow and extend beyond the original boundary. This parameter change (temperature-induced flow) transforms the dielectric layer's shape to provide better protection against undercutting during subsequent etching
2Manufacturing precision
If the dielectric layer is reflowed to extend coverage, then boundary protection is enhanced, but additional processing steps are required
Solution Approach 1:
The reflow process is combined with the existing fabrication sequence by integrating it between the dielectric layer formation and the etching step. This merging approach adds the necessary boundary control enhancement without creating entirely separate process flows, thus improving precision while managing complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This technique effectively prevents undercutting of the dielectric layer during etching, ensuring accurate boundary protection and maintaining the integrity of the work function material, which is crucial for the performance and reliability of nanosheet transistors.
Implementation Method 1
reflowing the dielectric layer such that at least a reflowed portion of the dielectric layer extends beyond the first location
Data Source
AI summary
Embodiments of the invention include a dielectric reflow technique for boundary control in which a first layer is deposited on a first transistor region and a second transistor region, the first and second transistor regions being adjacent. A dielectric layer is formed to protect the second transistor region such that the first transistor region is exposed, the dielectric layer bounded at a first location. In response to removing a portion of the first layer on the first transistor region, the dielectric layer protecting the second transistor region is reflowed such that at least a reflowed portion of the dielectric layer extends beyond the first location.