Dielectric Microstructure With Segregate-Pore Pairing Against Cracks
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Solution Overview
Problem
Existing dielectrics in multilayer electronic devices are prone to cracks and chips, which affects their sinterability, insulation resistance, and durability.
Innovation Solution
A dielectric composition that includes dielectric grains, segregates, and pores, where the segregates and pores form a specific combination with the segregate having a smaller size than the pore, and the average size ratio of segregates to pores ranging from 1.00 to 6.00, enhancing sinterability and reducing crack formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional dielectric materials are used in multilayer electronic devices, then the device structure can be formed, but cracks and chips readily occur affecting sinterability, insulation resistance, and durability
Solution Approach 1:
The patent introduces a porous structure where bubbles (pores) are intentionally formed within the dielectric layer at grain boundaries. These pores act as stress relief zones that prevent crack propagation during sintering and device operation. The pores are created by incorporating bubble-forming agents (such as carbonates or organic compounds) that decompose or volatilize during the sintering process, leaving controlled void spaces that improve overall device reliability and reduce crack incidence.
Solution Approach 2:
The patent creates a composite dielectric structure consisting of dielectric grains, grain boundaries, and embedded pores forming a specific combination. This composite architecture combines the electrical properties of dense dielectric grains with the mechanical stress-relief properties of pores. The specific combination of these elements at controlled ratios and distributions optimizes both electrical performance and mechanical durability, preventing cracks while maintaining insulation resistance.
2Reliability
If the dielectric structure is made denser to improve insulation resistance, then electrical performance improves, but crack formation becomes more likely due to internal stress
Solution Approach 1:
The patent applies local quality by creating different structural characteristics at different locations within the dielectric layer. Dense dielectric grains provide high insulation resistance in the bulk regions, while controlled pores at grain boundaries provide stress relief locally. This spatial differentiation of density allows the material to simultaneously achieve high electrical performance in conductive paths while maintaining mechanical strength at critical interfaces where cracks typically initiate.
Solution Approach 2:
The pores act as intermediary elements between the dense dielectric grains. Rather than directly connecting grains (which would compromise insulation), the pores serve as mediating structures at grain boundaries that relieve stress without creating continuous conductive paths. This intermediary positioning allows the dense grain structure to maintain insulation resistance while the pore network prevents stress concentration from propagating into cracks.
3Manufacturing precision
If sintering temperature is increased to improve densification and reduce pores, then material density improves, but crack incidence increases due to thermal stress
Solution Approach 1:
The patent applies preliminary action by pre-forming a porous structure within the green body (unsintered state) using bubble-forming agents distributed throughout the dielectric layer. This preliminary pore formation occurs before sintering, creating a template structure that guides subsequent densification. During sintering, these pre-formed pores control the densification process, allowing gradual consolidation that reduces thermal stress gradients and prevents crack formation while achieving adequate densification for electrical performance.
Solution Approach 2:
The patent utilizes parameter changes by controlling the size, distribution, and concentration of pores as critical parameters. By optimizing pore diameter (typically 0.1-2.0 μm), pore density (5-50 pores per mm²), and spatial distribution, the material achieves a balance where sufficient densification occurs for electrical performance while the pore network continues to provide stress relief during and after sintering. The pore parameters are controlled through formulation and processing conditions.
Data Source
AI summary
A dielectric includes a dielectric grain, a segregate, and a pore. The segregate and the pore are in contact to form a specific combination in a section of the dielectric. A multilayer electronic device includes a dielectric including a dielectric grain, a segregate, and a pore. The segregate and the pore are in contact to form a specific combination in a section of the dielectric.