Self-Aligned Dielectric Spacer for Magnetic Tunnel Junction Patterning

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Solution Overview

Problem

Semiconductor memory devices face challenges in patterning magnetic tunnel junctions without metallic contamination, which can lead to internal electrical shorts.

Innovation Solution

The use of self-aligned dielectric spacers to pattern magnetic tunnel junctions, where a hard mask portion is employed in two separate anisotropic etch processes to pattern the top electrode and underlying magnetic tunnel junction, with inner dielectric spacers preventing metallic residues from causing electrical shorts between the top electrode and the magnetic tunnel junction.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional patterning processes are used to pattern magnetic tunnel junctions, then manufacturing complexity is reduced, but metallic contamination occurs leading to internal electrical shorts

Engineering Contradiction:
Improveelectrical short preventionVSAvoidpatterning process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patterning process is divided into two separate anisotropic etch processes: first patterning the top electrode, then patterning the magnetic tunnel junction. This segmentation prevents metallic contamination by completing the top electrode pattern before exposing the magnetic tunnel junction to etching, thereby resolving the contradiction between reliability and process complexity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The top electrode is patterned in advance before the magnetic tunnel junction patterning begins. This preliminary action ensures that when the magnetic tunnel junction is subsequently etched, the top electrode is already protected and cannot be contaminated by metallic residues, thus improving reliability without significantly increasing overall process complexity

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If self-aligned dielectric spacers are used to pattern magnetic tunnel junctions, then manufacturing precision is improved, but device complexity increases

Engineering Contradiction:
Improvepatterning precisionVSAvoidstructure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Dielectric spacers are introduced as intermediary structures to define the pattern boundaries of both the top electrode and magnetic tunnel junction. These spacers serve as self-aligned masks that improve patterning precision by eliminating alignment errors, while their simple dielectric material composition minimizes the increase in device complexity

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dielectric spacers are formed conformally on the sidewalls of the top electrode, automatically positioning themselves with precise alignment. This self-service mechanism eliminates the need for separate alignment steps and complex alignment structures, thereby improving manufacturing precision without proportionally increasing device complexity

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents electrical shorts and enhances the manufacturing yield and reliability of magnetic tunnel junctions by isolating the top electrode from metallic residues during the patterning process.

Implementation Method 1

inner dielectric spacers preventing metallic residues from causing electrical shorts between the top electrode and the magnetic tunnel junction

Methodology Applied
Scientific EffectPhysical barrier isolation: Physical Containment

Data Source

PatentUS11289539B2Self-aligned dielectric spacer for magnetic tunnel junction patterning and methods for forming the same
Publication Date: 2022.03.29 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11289539B2 patent drawing
  • US11289539B2 patent drawing
  • US11289539B2 patent drawing

AI summary

Pillar stacks of a top electrode and a hard mask portion are formed over a layer stack containing a continuous reference magnetization layer, a continuous nonmagnetic tunnel barrier layer, and a continuous free magnetization layer. A continuous dielectric liner may be deposited and anisotropically etched to form inner dielectric spacers. The continuous free magnetization layer, the continuous nonmagnetic tunnel barrier layer, and the continuous reference magnetization layer may be anisotropically etched to form vertical stacks of a respective reference magnetization layer, a respective nonmagnetic tunnel barrier layer, and a respective free magnetization layer, which are magnetic tunnel junctions. The inner dielectric spacers prevent redeposition of a metallic material of the hard mask portions on sidewalls of the magnetic tunnel junctions. The hard mask portions may be removed, and a metallic cell contact structures may be formed on top of each top electrode.