Dielectric Stack Isolation for Backside Power Rail Transistors
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Solution Overview
Problem
Current semiconductor processing for backside power delivery networks requires complete substrate removal, which can damage the replacement gate and backside power rail, leading to congestion and limited routing capabilities.
Innovation Solution
A dielectric stack comprising a first and second dielectric layer is formed to isolate the source/drain region and gate from the backside power rail, allowing for a backside power delivery network that brings power from the back-end-of-line to the backside, thereby reducing congestion and enhancing routing capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If complete substrate removal is performed for backside power delivery network, then power delivery capability is improved, but damage to replacement gate and backside power rail occurs
Solution Approach 1:
A dielectric stack is introduced as an intermediary structure between the substrate and the backside power rail. This dielectric stack includes a first dielectric layer and a second dielectric layer that provides mechanical support and electrical isolation, allowing substrate removal to proceed while protecting the power rail from damage
Solution Approach 2:
The dielectric stack is formed beforehand to provide a cushioning effect during substrate removal. The stacked dielectric layers absorb mechanical stress and prevent direct contact between the substrate removal process and the backside power rail, thereby preventing damage before it can occur
2Productivity
If backside power rail is exposed for power delivery, then power delivery network efficiency is improved, but routing capability becomes limited and congestion occurs
Solution Approach 1:
The power delivery network is extended to the backside dimension of the semiconductor structure. By forming the backside power rail on the exposed backside surface after substrate removal, the patent creates additional routing space in the vertical dimension, allowing power lines to be routed on both frontside and backside without interfering with each other, thereby eliminating congestion and improving routing capability
Data Source
AI summary
A semiconductor structure includes a frontside source/drain region, and a dielectric stack disposed on a bottom surface of the frontside source/drain region. The dielectric stack includes a first dielectric layer and a second dielectric layer.