Dielectric Stack Isolation in Fin Structures for Higher Density

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Solution Overview

Problem

The challenge in semiconductor manufacturing is achieving effective electrical isolation between active regions while maintaining a high integration density of electronic components, which is crucial for miniaturization and performance enhancement.

Innovation Solution

The implementation of a continuous poly on oxide definition edge (CPODE) structure using a dielectric stack that penetrates fin structures and extends into the substrate, separating active regions and providing electrical isolation, combined with a replacement polysilicon gate technique to form functional gate structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a dielectric stack structure is used to penetrate fin structures for electrical isolation, then electrical isolation between active regions is improved, but device complexity increases

Engineering Contradiction:

Improveelectrical isolationVSAvoidstructure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The isolation structure is segmented into a multi-layer dielectric stack comprising first, second, and third dielectric layers with different material compositions and depths. This segmentation allows each layer to perform specific isolation functions at different vertical levels, achieving comprehensive electrical isolation while managing structural complexity through functional division.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The isolation structure transitions from traditional planar isolation to a three-dimensional vertical stack that penetrates through the fin structure depth. By adding the vertical dimension with multiple stacked layers at different depths, the structure achieves enhanced electrical isolation without increasing lateral footprint, thus improving isolation effectiveness while controlling overall device complexity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If continuous poly on oxide definition edge (CPODE) structure is implemented, then integration density is improved, but manufacturing precision requirements increase

Engineering Contradiction:

Improveintegration densityVSAvoidpatterning precision

Core Design Contradiction:

ProductivityVSManufacturing precision

Solution Approach 1:

The CPODE structure is formed as a continuous polysilicon layer deposited over the oxide and fin structures before subsequent processing steps. This preliminary formation of the definition edge provides a pre-established boundary that guides later lithography and etching operations, enabling higher integration density while reducing the precision burden on subsequent patterning steps by having the critical boundaries already defined.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS12406876B2Semiconductor structure including isolation structure with dielectric stack and method of forming the same

Publication Date: 2025.09.02 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

The present disclosure provides a method of manufacturing a semiconductor structure. The method includes providing a substrate; forming a fin structure on the substrate; forming a first dummy gate on the fin structure; forming a trench to penetrate the first dummy gate and the fin structure; forming a dielectric stack in the trench; removing a top portion of the dielectric stack in the trench to leave a lower portion of the dielectric stack in the trench; and forming a protective layer in the trench and directly on the lower portion of the dielectric stack.