Circuit Board Dielectric Stack for Low-Warpage Fine-Pitch Mounting
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Solution Overview
Problem
High-density, multi-layered circuit boards face warpage issues due to coefficient of thermal expansion mismatches between dielectric and core materials, leading to poor planarity and low yield during manufacturing, which complicates chip mounting.
Innovation Solution
A circuit board structure with a redistribution layer and dielectric layers of varying materials and thicknesses on opposite sides, where the redistribution layer is finer and denser than the circuit layer, and additional dielectric layers on one side help reduce warpage and improve planarity, allowing for direct chip mounting with fine-pitched conductive terminals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If high-density fine circuits are formed on the circuit board, then wiring density and integration are improved, but warpage occurs due to thermal expansion mismatch among dielectric materials
Solution Approach 1:
The patent applies local quality by using different dielectric materials with distinct thermal expansion coefficients in different regions of the circuit board. Specifically, a first dielectric layer with a first thermal expansion coefficient is used in regions with finer circuitries, while a second dielectric layer with a second thermal expansion coefficient is used in other regions. This localized material differentiation allows each region to experience thermal stress appropriate to its circuit density, thereby reducing overall warpage while maintaining high wiring density.
Solution Approach 2:
The patent employs composite materials by combining multiple dielectric layers with different thermal expansion properties. The circuit board structure includes a first dielectric layer and a second dielectric layer stacked together, each with different thermal expansion coefficients. This composite structure enables the board to accommodate differential thermal expansion across different regions, preventing warpage while supporting high-density fine circuitries.
2Stability of the object's composition
If different dielectric materials with varying thermal expansion coefficients are used, then warpage is reduced, but manufacturing complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the dielectric structure into distinct first and second dielectric layers, each with specific thermal expansion properties. This segmentation allows independent selection and optimization of material properties for each layer, simplifying the manufacturing process compared to using a single complex multi-material structure. Each dielectric layer can be manufactured separately using established processes, then combined to achieve the desired thermal management functionality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the reliability and electrical performance of the circuit board by reducing warpage and total thickness variation, facilitating higher planarity and denser layout density, thus improving the mounting process and overall structural integrity.
Implementation Method 1
the coefficients of thermal expansion (CTE) mismatch among the dielectric material covering the fine circuit, other circuit materials, and the core layer causes the warpage issue of the circuit board during the heating and cooling process as the manufacturing process
Data Source
AI summary
A circuit board structure includes a circuit substrate having opposing first and second sides, a redistribution structure disposed at the first side, and a dielectric structure disposed at the second side. The circuit substrate includes a first circuit layer disposed at the first side and a second circuit layer disposed at the second side. The redistribution structure is electrically coupled to the circuit substrate and includes a first leveling dielectric layer covering the first circuit layer, a first thin-film dielectric layer disposed on the first leveling dielectric layer and having a material different from the first leveling dielectric layer, and a first redistributive layer disposed on the first thin-film dielectric layer and penetrating through the first thin-film dielectric layer and the first leveling dielectric layer to be in contact with the first circuit layer. The dielectric structure includes a second leveling dielectric layer disposed below the second circuit layer.