Dielectric Layer Stress Buffer for High Power Electronic Packages
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Solution Overview
Problem
High power electronic device packages, such as those used in voltage converters, face challenges in reliability and performance due to exposure to harsh conditions like high humidity, which can affect the semiconductor chips and electrical components.
Innovation Solution
A method involving a semiconductor chip with contact pads, a contact element, a dielectric layer, and an encapsulant is used to create an electronic device package. The dielectric layer acts as a stress buffer and humidity barrier, while the encapsulant provides electrical isolation, and the method includes various deposition techniques like spin coating, laminating, and curing to enhance adhesion and protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If semiconductor chips are exposed to harsh environmental conditions, then the device can operate in high power applications, but the reliability deteriorates due to humidity and stress effects
Solution Approach 1:
A stress buffer layer is applied over the semiconductor chips before final encapsulation to preemptively protect against mechanical stress and humidity. This layer is specifically designed to absorb thermal expansion differences and prevent stress-induced failures before they occur during high power operation.
Solution Approach 2:
An intermediate stress buffer layer is introduced between the semiconductor chips and the outer encapsulation. This intermediary layer mediates the mechanical stress transmission and provides a humidity barrier, allowing the device to handle high power while maintaining reliability by decoupling the chips from direct environmental exposure.
2Reliability
If a protective encapsulation is applied to protect semiconductor chips, then the reliability improves, but the device complexity increases due to additional layers and processing steps
Solution Approach 1:
The stress buffer layer and humidity barrier functions are merged into a single integrated layer structure. This combined layer simultaneously provides mechanical stress relief and environmental protection, reducing the number of separate components needed while maintaining high reliability.
Solution Approach 2:
The stress buffer layer is designed to perform multiple functions: it acts as a mechanical stress absorber, a humidity barrier, and an adhesive bonding layer. This multi-functionality reduces overall package complexity by eliminating the need for separate dedicated components for each protective function.
3Reliability
If multiple layers are applied to provide stress buffering and humidity protection, then the reliability improves, but the manufacturing process becomes more complex
Solution Approach 1:
The stress buffer layer is applied as part of the preliminary packaging process before final encapsulation. This preliminary action ensures that stress protection and humidity barrier properties are established early in the manufacturing sequence, simplifying subsequent processing steps and improving overall fabrication efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively enhances the reliability and performance of electronic device packages by protecting the semiconductor chips from environmental stress and ensuring electrical isolation, thereby improving the durability and efficiency of high power modules like voltage converters.
Implementation Method 1
The dielectric layer acts as a stress buffer
Implementation Method 2
the dielectric layer acts as a stress buffer and humidity barrier
Implementation Method 3
the encapsulant provides electrical isolation
Data Source
AI summary
A method for fabricating an electronic device package includes providing a carrier, disposing a semiconductor chip onto the carrier, the semiconductor chip having a contact pad on a main face thereof remote from the carrier, applying a contact element onto the contact pad, applying a dielectric layer on the carrier, the semiconductor chip, and the contact element, and applying an encapsulant onto the dielectric layer.