Dielectric Substrate Thickness for HV Chip Ion Protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High-voltage semiconductor chip packaging faces challenges in electrode geometry, spacing, and protection against ion and moisture diffusion, with existing technologies struggling to maintain electric field integrity and cost-effectiveness.
Innovation Solution
A semiconductor device comprising a high-voltage semiconductor transistor chip with a dielectric inorganic substrate of at least 50 μm thickness, featuring metal structures connected to load and control electrodes, which allows for optimized electrode geometry, enhanced heat dissipation, and protection against ion diffusion through the substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a thin substrate is used to reduce device complexity, then manufacturing cost decreases, but electric field integrity and protection against ion diffusion deteriorate
Solution Approach 1:
The patent specifies a minimum substrate thickness of 50 μm to maintain electric field integrity while preventing ion diffusion. This parameter change resolves the contradiction by establishing an optimal thickness range that satisfies both reliability requirements and manufacturing constraints.
2Reliability
If electrode spacing is increased to maintain electric field integrity, then HV edge protection improves, but chip area consumption increases
Solution Approach 1:
The patent utilizes the substrate thickness dimension (vertical direction) to provide field line exit paths and ion diffusion barriers, allowing lateral electrode spacing to be reduced without compromising HV edge protection. This dimensional transition resolves the area consumption issue while maintaining reliability.
3Object-affected harmful factors
If substrate thickness is increased to prevent ion diffusion, then protection against ion and moisture diffusion improves, but manufacturing cost increases
Solution Approach 1:
The patent establishes a minimum substrate thickness of 50 μm that provides adequate ion and moisture diffusion protection while remaining compatible with standard manufacturing processes. This parameter optimization balances protection requirements with manufacturing cost-effectiveness.
Data Source
AI summary
A semiconductor device includes a high-voltage semiconductor transistor chip having a front side and a backside. A low-voltage load electrode and a control electrode are disposed on the front side of the semiconductor transistor chip. The semiconductor device further includes a dielectric inorganic substrate having a first side and a second side opposite the first side. A pattern of first metal structures runs through the dielectric inorganic substrate and is connected to the low-voltage load electrode. At least one second metal structure runs through the dielectric inorganic substrate and is connected to the control electrode. The front side of the semiconductor transistor chip is attached to the first side of the dielectric inorganic substrate. The dielectric inorganic substrate has a thickness measured between the first side and the second side of at least 50 μm.