Dielectric Thin Film Memory Device with Charge Trap Layers
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Solution Overview
Problem
Existing non-volatile memory devices face challenges in high integration due to complex structures and high process temperatures, particularly in flash memory and Ovonic Unified Memory devices, which require thick interconnections and high current for phase changes, making them difficult to manufacture and integrate densely.
Innovation Solution
A memory device with a dielectric thin film comprising multiple layers of different charge trap densities, formed using materials like TiO2, ZrO2, and perovskite structures with impurities, allowing for controlled space-charge limit currents and a simple manufacturing process, enabling high integration density without phase changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If flash memory devices use a floating gate structure to accumulate charge, then data storage capability is achieved, but device structure becomes complicated and difficult to densely integrate
Solution Approach 1:
The patent extracts the charge accumulation function from the complex floating gate structure and relocates it to a simpler charge trap layer within the dielectric thin film. This separation allows the electrode structure to be simplified while maintaining the essential data storage capability through charge trapping mechanisms.
Solution Approach 2:
The patent changes the fundamental operating parameter from charge accumulation on a floating gate to charge trapping within dielectric layers. By using materials with different charge trap densities and applying voltage pulses to control space-charge limit currents, the device achieves data storage functionality with a simpler structure.
2Reliability
If Ovonic Unified Memory uses phase change from crystalline to non-crystalline state, then electrical conductivity difference is achieved, but heat and current requirements make thick interconnections necessary
Solution Approach 1:
The patent replaces the thermal phase change mechanism with an electrical field-based charge trapping mechanism. Instead of using heat to induce phase changes between crystalline and non-crystalline states, the device uses voltage pulses to control charge trapping and space-charge limit currents, eliminating the need for thermal processing and thick interconnections.
Solution Approach 2:
The patent changes the operating mechanism from thermal phase change to electrical charge trapping. By utilizing dielectric layers with different charge trap densities and controlling space-charge limit currents through applied voltage, the device achieves conductivity modulation without requiring the high temperatures and currents associated with phase change memory.
3Reliability
If Mn oxide layers with perovskite structure are used to change electrical resistance, then non-volatile memory function is achieved, but high process temperature and complicated structure make manufacturing difficult
Solution Approach 1:
The patent uses composite dielectric thin films composed of multiple dielectric layers with different charge trap densities. By combining materials such as TiO2, ZrO2, HfO2, V2O5, Nb2O5, Ta2O5, NiO, PdO, or perovskite structures with controlled impurity content, the device achieves non-volatile memory functionality while allowing for lower process temperatures and simpler manufacturing compared to pure Mn oxide perovskite structures.
Solution Approach 2:
The patent applies local quality by creating dielectric layers with spatially varying charge trap densities through controlled impurity addition. Different dielectric layers or regions within the thin film have different trap densities tailored to specific functional requirements, enabling precise control of space-charge limit currents while using materials that can be processed at lower temperatures.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables a simple and efficient manufacturing process for non-volatile memory devices with enhanced integration density and improved electrical characteristics, allowing for controlled conductivity changes based on applied voltage, thereby overcoming the limitations of existing technologies.
Implementation Method 1
at least one dielectric thin film disposed on the bottom electrode and having a plurality of dielectric layers with different charge trap densities from each other
Implementation Method 2
different space-charge limit currents may flow in the dielectric thin film according to the charge trap densities
Data Source
AI summary
A memory device including a dielectric thin film having a plurality of dielectric layers and a method of manufacturing the same are provided. The memory device includes: a bottom electrode; at least one dielectric thin film disposed on the bottom electrode and having a plurality of dielectric layers with different charge trap densities from each other; and an top electrode disposed on the dielectric thin film. Therefore, a memory device, which can be readily manufactured by a simple process and can be highly integrated using its simple structure, can be provided.