Dielectric Through Groove for Crack Prevention in Chip Packages
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The reliability and performance of chip packages are compromised due to cracks formed in low-k dielectric material during the dicing process, which can lead to stress-induced failures.
Innovation Solution
A chip package design featuring a substrate with a dielectric layer that includes a through groove in the scribe line region, which extends along the edge of the chip region, effectively preventing cracks from propagating into the chip region and enhancing structural integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the wafer is diced into individual chip packages, then the chip packages can be separated and used, but cracks are formed in the low-k dielectric material due to stress caused by the dicing process
Solution Approach 1:
The dielectric layer is segmented by forming through grooves that divide it into multiple regions. These grooves act as stress relief structures that prevent crack propagation across the entire chip package during the dicing process, while still allowing the wafer to be successfully separated into individual chip packages.
2Ease of manufacture
If the dicing process is performed to separate chip packages, then individual packages are obtained, but stress-induced cracks reduce the reliability and performance of the chip package
Solution Approach 1:
The through grooves are formed in the dielectric layer before the dicing process is performed. This preliminary action creates stress relief paths in advance, preventing cracks from forming during subsequent dicing operations and maintaining dielectric material quality throughout the manufacturing process.
3Reliability
If a through groove is formed in the dielectric layer corresponding to the scribe line region, then crack propagation is prevented and reliability is enhanced, but the device structure becomes more complex
Solution Approach 1:
The through grooves are formed only in the scribe line region of the dielectric layer, not across the entire chip package. This localized modification provides the necessary stress relief and crack prevention exactly where it is needed during dicing, while minimizing the impact on the overall device structure and maintaining simplicity in the chip region.
Data Source
AI summary
A chip package including a substrate that has a first surface and a second surface opposite thereto is provided. The substrate includes a chip region and a scribe line region that extends along the edge of the chip region. The chip package further includes a dielectric layer disposed on the first surface of the substrate. The dielectric layer corresponding to the scribe line region has a through groove that extends along the extending direction of the scribe line region. A method of forming the chip package is also provided.