Monolithic Semiconductor Assemblies Without Buried Oxide Isolation
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Solution Overview
Problem
Current semiconductor device assemblies using silicon-on-insulator (SOI) technologies are costly and have poor thermal conductivity, which hinders efficient heat dissipation and increases on-resistance in high-side switches due to interference between monolithically integrated devices.
Innovation Solution
The use of semiconductor device assemblies without buried oxide layers, employing isolation trenches filled with dielectric materials to electrically isolate semiconductor device stacks, thereby reducing material and manufacturing costs and improving thermal dissipation efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon-on-insulator (SOI) technologies are used to isolate monolithically integrated devices, then electrical isolation between devices is improved, but manufacturing cost increases due to expensive SOI wafers and processing costs
Solution Approach 1:
The semiconductor substrate is divided into multiple isolated regions by etching trenches between device areas. These trenches are then filled with dielectric material to create electrical isolation. This segmentation approach achieves device isolation without requiring expensive SOI wafers, as the isolation structures are formed through standard semiconductor processing steps on conventional substrates.
Solution Approach 2:
A dielectric material is introduced as an intermediary substance filling the isolation trenches between semiconductor devices. This dielectric layer acts as an electrical insulator, preventing interference between adjacent devices while allowing the use of cost-effective conventional substrates instead of expensive SOI technologies.
2Reliability
If silicon-on-insulator (SOI) technologies are used to isolate devices, then electrical isolation is improved, but thermal dissipation efficiency deteriorates due to poor thermal conductivity of buried oxide layers
Solution Approach 1:
The problematic buried oxide layer characteristic of SOI technologies is completely removed from the substrate structure. By using conventional semiconductor substrates without buried oxide layers and forming isolation through surface-level trenches, the design eliminates the thermal conduction barrier while preserving electrical isolation functionality through dielectric-filled trenches.
Solution Approach 2:
Electrical isolation is achieved locally at specific regions where trenches are etched between devices, rather than using a global buried oxide layer. This localized isolation approach allows heat to dissipate through the bulk substrate while preventing electrical interference only where needed, thus resolving the thermal dissipation issue inherent in SOI technologies.
3Productivity
If monolithically integrated devices are implemented in a common semiconductor substrate, then device integration is improved, but interference between devices occurs causing negative back-bias and increased on-resistance
Solution Approach 1:
The common semiconductor substrate is segmented into isolated device regions by etching trenches between adjacent devices. These trenches are filled with dielectric material to create electrical barriers. This allows multiple devices to be monolithically integrated on the same substrate while preventing harmful electrical interference and negative back-bias effects between devices.
Solution Approach 2:
Dielectric material is used as an intermediary substance filling the isolation trenches between monolithically integrated devices. This dielectric layer provides electrical insulation that prevents interference and negative back-bias effects while allowing the devices to remain on a common substrate, thus maintaining integration benefits without the performance degradation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively isolates semiconductor devices, reduces thermal resistance, and enhances heat dissipation, making it a cost-effective and thermally efficient alternative to traditional SOI technologies.
Implementation Method 1
an isolation trench having a dielectric material disposed therein, the isolation trench being disposed between the first portion of the semiconductor substrate and the second portion of the semiconductor substrate. The isolation trench can electrically isolate the first portion of the semiconductor substrate from the second portion of the semiconductor substrate.
Implementation Method 2
buried oxide layers included in SOI wafers have poor thermal conductivity, which is undesirable for providing efficient heat dissipation in power semiconductor devices
Data Source
AI summary
In a general aspect, a semiconductor device assembly can include a semiconductor substrate that excludes a buried oxide layer. The semiconductor device assembly can also include a first semiconductor device stack disposed on a first portion of the semiconductor substrate, and a second semiconductor device stack disposed on a second portion of the semiconductor substrate. The semiconductor device assembly can further include an isolation trench having a dielectric material disposed therein, the isolation trench being disposed between the first portion of the semiconductor substrate and the second portion of the semiconductor substrate. The isolation trench can electrically isolate the first portion of the semiconductor substrate from the second portion of the semiconductor substrate.


