Differential Capacitor-Array ADC for Precise Low-Power Conversion

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Solution Overview

Problem

Conventional analogue-to-digital converters, particularly successive approximation types, face challenges in efficiently converting analogue input signals to digital outputs with high precision and low power consumption, especially in medical devices where power efficiency is critical.

Innovation Solution

The proposed analogue-to-digital converter employs a capacitive structure with multiple capacitor pairs and a switching array controlled by logic, utilizing differential voltage inputs and a common mode voltage to determine digital bits, along with a comparator and redundant algorithms to enhance precision and reduce power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If conventional successive approximation ADC architecture is used, then conversion precision can be achieved, but power consumption is high

Engineering Contradiction:
Improveconversion precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The capacitor array is divided into multiple independent capacitor pairs, each pair handling specific bit conversions. This segmentation allows the converter to operate in stages, activating only necessary capacitor pairs for each conversion cycle, thereby reducing overall power consumption while maintaining precision

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The ADC employs periodic conversion cycles where capacitor pairs are selectively activated based on conversion requirements. By using periodic action, the system can enter low-power states between conversions and only activate full precision modes when needed, balancing precision requirements with power consumption

Inventive Principle:
Principle #19Periodic action

2Adaptability or versatility

If conventional ADC architecture is used, then conversion functionality is provided, but device complexity is high

Engineering Contradiction:
Improveconversion functionalityVSAvoiddevice complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

Multiple capacitor pairs are merged into a unified array structure with shared control logic and common connections. This merging reduces the overall number of discrete components and interconnections compared to implementing separate conversion circuits for each bit, thereby reducing device complexity while maintaining full conversion functionality

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The capacitor pairs and switching array are designed to perform multiple functions: they can handle different bit significances, support various conversion modes, and adapt to different input signal ranges. This multi-functionality eliminates the need for separate dedicated circuits for each function, reducing overall device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution achieves high precision in digital signal conversion with reduced power consumption, suitable for medical devices, by optimizing the capacitive structure and logic control, thereby improving the efficiency and reliability of the conversion process.

Implementation Method 1

a first plurality of capacitors and a second plurality of capacitors, each capacitor of the first and second plurality of capacitors having a first contact and a second contact

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8786484B2Analogue to digital converter, an integrated circuit and medical device
Publication Date: 2014.07.22 AGENCY FOR SCI TECH & RES
  • US8786484B2 patent drawing
  • US8786484B2 patent drawing
  • US8786484B2 patent drawing

AI summary

An analogue to digital converter includes a first input connection to receive a first part of the analogue input signal, a second input connection to receive a second part of the analogue input signal, a first and second plurality of capacitors, each capacitor of the first plurality of capacitors forms a capacitor pair with a corresponding capacitor in the second plurality of capacitors During a sampling period, the first input connection couples the first part of the analogue input signal to a first contact of each capacitor of the first plurality of capacitors and the second input connection couples the second part of the analogue input signal to a first contact of each capacitor of the second plurality of capacitors. Further, a switching array couples a second contact of each capacitor of the first and second plurality of capacitors to a common mode voltage to determine a first bit of a digital output signal.