Differential Amplifier Cascode-Shunt Circuit for Balanced Output

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Solution Overview

Problem

Existing differential amplifier circuits face challenges in achieving balanced charging and discharging currents, leading to unbalanced voltage waveforms and reduced gain due to divided current signals.

Innovation Solution

The proposed amplifier circuit includes a configuration with cascode and shunt transistors that divide the differential current into specific ratios, using emitter-follower circuits to generate balanced differential output signals, and load circuits to convert current signals into voltage signals, thereby maintaining gain and improving current balance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the differential current is divided into multiple paths (through cascode and shunt transistors), then the current balance between charging and discharging is improved, but the gain is reduced due to current division

Engineering Contradiction:
Improvecurrent balanceVSAvoidgain
Core Design Contradiction:
ReliabilityVSPower

Solution Approach 1:

The differential current is segmented into multiple paths: one path through the cascode transistor for voltage amplification and another path through the shunt transistor for current balancing. This segmentation allows the circuit to simultaneously achieve current balance and maintain gain by distributing the current functionally rather than losing it through division.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the differential current is divided into cascode and shunt paths, then the charging and discharging currents are balanced, but the output signal exhibits overshoot and undershoot

Engineering Contradiction:
Improvecurrent balanceVSAvoidoutput signal stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The shunt transistor operates in a feedback configuration where its base is connected to the emitter of the cascode transistor. This feedback mechanism allows the shunt transistor to dynamically adjust its current to compensate for imbalances, thereby stabilizing the output signal and reducing overshoot and undershoot while maintaining current balance.

Inventive Principle:
Principle #23Feedback

3Speed

If emitter-follower circuits are used to generate differential output signals, then the speed of the amplifier circuit is improved, but the complexity of the circuit increases

Engineering Contradiction:
Improveamplifier speedVSAvoidcircuit complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The emitter-follower circuits are designed to perform multiple functions: they provide high-speed output buffering, maintain voltage levels, and contribute to current balancing through their connection to the shunt transistors. This multi-functionality justifies the increased complexity by delivering significant performance benefits in speed and signal integrity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12476597B2Amplifier circuit
Publication Date: 2025.11.18 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US12476597B2 patent drawing
  • US12476597B2 patent drawing
  • US12476597B2 patent drawing

AI summary

An amplifier circuit includes a first cascode transistor and a second cascade transistor, the first cascade transistor being electrically connected between a first transistor and a first load circuit, the second cascode transistor being electrically connected between a second transistor and a second load circuit. The amplifier circuit includes a first shunt transistor and a second shunt transistor, the first shunt transistor being electrically connected between the first transistor and a first emitter-follower circuit, the second shunt transistor being electrically connected between the second transistor and a second emitter-follower circuit. A differential current signal includes a first differential current and a second differential current, the first differential current flowing through the first cascode transistor and the second cascode transistor, and a second differential current flowing through the first shunt transistor and the second shunt transistor.