Differential Amplifier Bias Control to Prevent Deadlock States
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Solution Overview
Problem
Conventional differential amplifiers experience erroneous bias conditions and transient voltage variations when input voltage exceeds operable regions, leading to malfunction and deadlock states due to insufficient input current.
Innovation Solution
Incorporating a detecting and controlling circuit that outputs compensative current to prevent malfunction, even when input current is insufficient or zero, by correlating the voltage of a bias node with the differential input signal and using a biasing circuit to supply input bias current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the input voltage of the differential amplifier exceeds the operable region, then the MOS transistors enter the cut-off region, but this leads to erroneous bias conditions and deadlock states
Solution Approach 1:
The detecting and controlling circuit proactively detects when input voltage exceeds the operable region and applies compensative current in advance to prevent the MOS transistors from entering the cut-off region. This preliminary anti-action ensures the transistors remain in the saturation region, avoiding erroneous bias conditions and deadlock states before they occur.
Solution Approach 2:
The detecting and controlling circuit continuously monitors the input voltage and provides feedback by adjusting the compensative current accordingly. When the input voltage exceeds the operable region, the circuit detects this condition and feeds back the necessary compensative current to maintain proper bias conditions, preventing transistor cut-off and ensuring stable operation.
2Adaptability or versatility
If the input voltage resumes normal range, then the differential amplifier can operate normally, but additional time is required for loop adjustment causing transient voltage variations
Solution Approach 1:
The detecting and controlling circuit performs preliminary action by maintaining the MOS transistors in the saturation region through compensative current even when input voltage is temporarily out of range. When the input voltage resumes normal range, the transistors are already prepared and can immediately resume normal operation without requiring additional loop adjustment time, thus eliminating transient voltage variations.
Solution Approach 2:
The compensative current ensures continuous useful action by keeping the MOS transistors in the saturation region throughout the entire process, including when input voltage exceeds the operable region. This continuity prevents the transistors from entering cut-off and ensures uninterrupted operation, eliminating the need for loop adjustment and transient voltage variations when input voltage returns to normal.
3Ease of operation
If the voltage levels at input terminals are high and common-mode feedback voltage level is low, then the output node voltage becomes undefined, but this causes common-mode loop malfunction and deadlock
Solution Approach 1:
The detecting and controlling circuit applies preliminary anti-action by providing compensative current that prevents the output node voltage from becoming undefined. When input voltage levels are high and common-mode feedback voltage level is low, the compensative current ensures the MOS transistors remain in saturation, preventing the undefined voltage state and avoiding common-mode loop malfunction and deadlock before they occur.
Solution Approach 2:
The detecting and controlling circuit provides feedback by monitoring the voltage conditions at input terminals and common-mode feedback node, and adjusting the compensative current accordingly. This feedback mechanism ensures that even when voltage levels create potentially problematic conditions, the compensative current maintains proper biasing and prevents loop malfunction and deadlock states.
Data Source
AI summary
Disclosed is a differential amplifier including an input circuit, a detecting and controlling circuit, and an output circuit. The input circuit outputs input current to two output nodes according to the voltage of a differential input signal and the voltage of a bias node. The detecting and controlling circuit outputs compensative current to the two output nodes according to control bias voltage and the voltage of the bias node, in which the voltage of the bias node and the compensative current relate to the voltage of the differential input signal. The output circuit is coupled to the two output nodes and outputs a differential output signal according to the sum of the input current and the compensative current. Due to the detecting and controlling circuit outputting the compensative current, the differential amplifier prevents itself from entering a deadlock state even though the input current is insufficient or zero.