Differential Amplifier Biasing for Stable Single-Ended Conversion

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Solution Overview

Problem

Conventional differential circuits with trans-impedance amplifiers and differential amplifiers suffer from output offset voltage fluctuations due to varying collector biases and input currents, especially when transistors exhibit lesser breakdown characteristics, making it difficult to maintain a preset output offset level.

Innovation Solution

A differential circuit design that includes a reference generator and cascode transistors, where the reference voltage is generated to be constant relative to the average voltage, independently of signal intensity and power supply fluctuations, ensuring consistent collector bias for differential transistors and minimizing output offset between complementary signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Power

If conventional differential amplifier is used with varying input current, then signal amplification is achieved, but output offset voltage fluctuates due to varying collector biases

Engineering Contradiction:
Improvesignal amplification capabilityVSAvoidoutput offset stability
Core Design Contradiction:
PowerVSReliability

Solution Approach 1:

The invention changes the biasing parameter from a fixed reference voltage to a dynamically adjusted reference voltage that compensates for input current variations. The reference voltage is adjusted in proportion to the input current to maintain constant collector bias, thereby stabilizing the output offset voltage while preserving signal amplification capability.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention introduces a feedback mechanism where the reference voltage is derived from the input current through a reference current generator. This feedback loop automatically adjusts the reference voltage based on the actual input current level, ensuring that the collector bias remains constant despite input current variations, thus resolving the offset stability issue.

Inventive Principle:
Principle #23Feedback

2Device complexity

If transistor breakdown characteristic is low, then device complexity is reduced, but collector current increases at high collector biases causing offset voltage variation

Engineering Contradiction:
Improvetransistor breakdown characteristicVSAvoidoffset voltage consistency
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The invention changes the operating parameter of the collector bias from a fixed value to a dynamically controlled value that adapts to the transistor's breakdown characteristics. By adjusting the reference voltage in proportion to the input current, the collector bias is kept within a safe range that prevents excessive collector current even when transistor breakdown characteristics vary, thereby maintaining offset voltage consistency.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If fixed reference voltage is used for cascode transistor bias, then circuit simplicity is maintained, but collector bias varies with power supply fluctuations and signal intensity

Engineering Contradiction:
Improvecircuit simplicityVSAvoidcollector bias stability
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The invention replaces the fixed reference voltage with a feedback-based reference voltage that is dynamically generated from the input current. This feedback mechanism automatically compensates for power supply fluctuations and signal intensity variations, maintaining stable collector bias without significantly increasing circuit complexity, as the reference voltage is derived from existing circuit signals.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8362841B2Conversion circuit from single phase signal to differential phase signal
Publication Date: 2013.01.29 SUMITOMO ELECTRIC INDUSTRIES LTD
  • US8362841B2 patent drawing
  • US8362841B2 patent drawing
  • US8362841B2 patent drawing

AI summary

A differential amplifier showing a suppressed output offset is disclosed. The differential amplifier includes a pair of differential transistors, a pair of cascode transistors, and a reference generator. One of differential transistors receives an AC signal, while, the other of differential transistors receives an average voltage of the AC signal. The reference generator receives the average voltage of the AC signal and outputs a bias commonly provided to the cascode transistor. The bias is raised by a substantially constant level from the average voltage, which compensates the output offset of the differential amplifier.