Differential Amplifier CMFB Trim Circuit for Low-Noise Offset Control

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Solution Overview

Problem

Existing differential amplifiers with high speed common mode feedback and programmable input offset trim capability suffer from high noise levels, complex circuitry, high power consumption, and large integrated circuit chip area due to separate and complex circuitry for common mode feedback and input offset trim functions.

Innovation Solution

A differential amplifier design that combines common mode feedback and input offset trim circuitry into a single functional circuit, using a combined CMFB and offset correction circuit with transistors and a trim voltage generator to reduce noise and complexity, while maintaining high speed operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate common mode feedback circuitry and input offset trim circuitry are used, then high speed common mode feedback and programmable input offset trim capability are achieved, but noise levels increase and circuit complexity increases

Engineering Contradiction:
Improvecommon mode feedback capabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the common mode feedback circuitry and input offset trim circuitry into a single integrated circuit block. The combined circuit uses shared transistors (M3, M4, M5) and common current sources to perform both functions simultaneously, eliminating the need for separate independent circuits and reducing overall complexity while maintaining both high speed common mode feedback and programmable input offset trim capabilities

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The combined circuit block serves multiple functions: it provides common mode feedback through transistors M3-M5 while simultaneously enabling input offset trimming through the same transistor structure. The circuit can operate in different modes (common mode feedback mode, offset trim mode, or both simultaneously) by controlling the same hardware resources, making the circuit universal and multi-functional

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If separate common mode feedback circuitry and input offset trim circuitry are used, then high speed common mode feedback and programmable input offset trim capability are achieved, but noise levels increase

Engineering Contradiction:
Improvecommon mode feedback capabilityVSAvoidnoise levels
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

By merging the common mode feedback and offset trim circuits into a single integrated structure, the patent reduces the total number of discrete components and interconnections. This consolidation minimizes the number of noise-generating elements and parasitic effects, resulting in lower overall noise levels while preserving both high speed common mode feedback and programmable input offset trim capabilities

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If separate common mode feedback circuitry and input offset trim circuitry are used, then programmable input offset trim capability is achieved, but integrated circuit chip area increases

Engineering Contradiction:
Improveinput offset trim capabilityVSAvoidintegrated circuit chip area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent integrates both common mode feedback and input offset trim functionalities into a single compact circuit block that occupies minimal chip area. By sharing transistors M3, M4, M5 and common current sources between both functions, the design achieves programmable input offset trim capability without requiring separate dedicated circuitry, thus minimizing the total integrated circuit chip area

Inventive Principle:
Principle #5Merging (Combining)

4Speed

If separate common mode feedback circuitry and input offset trim circuitry are used, then high speed common mode feedback is achieved, but power consumption increases

Engineering Contradiction:
Improvecommon mode feedback speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The combined circuit design shares common current sources and transistor structures between common mode feedback and offset trim functions. This sharing of active components reduces the total power consumption compared to having separate independent circuits, while maintaining the high speed performance of common mode feedback through the efficient use of shared hardware resources

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7733179B2Combination trim and CMFB circuit and method for differential amplifiers
Publication Date: 2010.06.08 TEXAS INSTRUMENTS INC
  • US7733179B2 patent drawing
  • US7733179B2 patent drawing
  • US7733179B2 patent drawing

AI summary

A differential amplifier (10-1,2) includes an input stage (7) including first (M1) and second (M2) input transistors and first (4A) and second (4B) load devices. Sources of the first and second input transistors are connected together. Drains of the first and second input transistors are coupled by first (12) and second (13) conductors to the first and second load devices, respectively. Common mode feedback circuitry (6A) including first (M3), second (M4), and third (M5) transistors is combined with offset correction circuitry (8) including the second transistor and the third transistor. Sources of the first, second, and third transistors are coupled to a tail current source (11). Drains of the second and third transistors are coupled to the first and second conductors, respectively. A common mode voltage (VOCM) is applied to a gate of the first transistor. Offset trim voltages are applied to gates of the second and third transistors.