Single-Ended to Differential Amplifier With Sub-1 Hz Common-Mode Filter
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Solution Overview
Problem
Integrated circuit sensor circuits face interference from noise in power supplies, which limits the quality of signal processing and the ability to provide low frequency poles due to distortion caused by power supply and other circuits, necessitating either larger or more expensive off-chip common-mode voltage supplies.
Innovation Solution
A high-impedance network is integrated into the amplifier circuit to balance impedance and reject common-mode voltage variations, allowing for extremely low frequency poles without increasing chip size or sacrificing performance, using anti-parallel diode pairs and impedance networks to provide high impedance with minimal die area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If traditional filters are provided in combination with power supplies on an integrated circuit chip, then the filter can be integrated into the circuit, but the quality of signal processing is limited due to distortion caused by power supply noise and other circuits
Solution Approach 1:
The patent extracts the filter circuit from the noisy power supply environment by providing a separate, dedicated filter circuit that is electrically isolated from the common-mode power supply through high-impedance coupling. This allows the filter to operate independently without being affected by power supply noise and distortion, thereby maintaining high signal processing quality while remaining integrated on the chip.
Solution Approach 2:
The patent introduces high-impedance networks as intermediary elements between the power supply and the filter circuit. These high-impedance networks act as mediators that block the transmission of noise and distortion from the power supply to the filter, allowing the filter to process signals with high fidelity while still being powered by the integrated power supply.
2Ease of manufacture
If traditional filters are provided in combination with power supplies on an integrated circuit chip, then the filter can be integrated into the circuit, but the ability to provide low frequency poles is limited
Solution Approach 1:
The patent extracts the low frequency pole generation capability from the constraints of traditional integrated filter designs. By using high-impedance networks with very high impedance values (e.g., 10^12 ohms or higher), the circuit can achieve extremely low frequency poles (below 1 Hz) that would be impossible with conventional integrated filter designs, while maintaining full integration on the chip.
3Reliability
If off-chip common-mode voltage supplies are used to avoid distortion, then power supply rejection is improved, but the size and cost of the system increases
Solution Approach 1:
The patent introduces high-impedance networks as intermediary elements between the on-chip common-mode power supply and the filter circuit. These high-impedance networks effectively block the transmission of power supply noise and distortion to the signal path, achieving power supply rejection ratios comparable to off-chip supplies while maintaining the compact size and integration benefits of on-chip power supplies.
Solution Approach 2:
The patent replaces the mechanical/physical separation approach (using off-chip power supplies) with an electrical solution (high-impedance isolation networks). This substitution allows the system to achieve the same noise isolation performance as off-chip supplies would provide, but without the increased size, complexity, and cost associated with external power supply components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces distortion and improves power supply rejection, enabling the use of lower quality on-chip common-mode supplies while maintaining performance, thus reducing costs and size associated with traditional off-chip solutions.
Implementation Method 1
The network can include an anti-parallel diode pair coupled between first and second nodes. The anti-parallel diode pair can include a first diode including a P+/NWELL junction and a second diode including N+/PWELL junction.
Implementation Method 2
a first diode including a P+/NWELL junction and a second diode including N+/PWELL junction
Data Source
AI summary
Apparatus and methods for an integrated circuit, single ended-to-differential amplifier are provided. In an example, the amplifier can include an amplifier circuit having a first input configured to receive a single-ended signal, a second input, and a differential output configured to provide an amplified representation of the single-ended signal. The amplifier can include a filter circuit configured to balance a common-mode voltage between the first and second inputs of the amplifier circuit. The filter circuit can include a common-mode input configured to receive the common-mode voltage, a first impedance network coupled between the common-mode input and the first input of the amplifier circuit, and a second impedance network coupled between the common-mode input and the second input of the amplifier circuit. The filter circuit can provide a low frequency pole below 1 hertz.