Differential Amplifier Delay Balancing for Duty Cycle Distortion
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Solution Overview
Problem
In modern integrated circuit systems, duty cycle distortion (DCD) occurs due to unbalanced delay in differential to single-ended conversion, leading to timing uncertainty and reduced timing margin in high-speed data links and memory interfaces.
Innovation Solution
Replicating the input stage and cross-connecting inputs to balance delay, followed by summing the outputs after open loop delay matched inversion, utilizing full-swing CMOS delay cells to reduce DCD over process voltage and temperature variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a differential to single-ended conversion is performed in a receiving amplifier, then the output signal can be generated, but the input path from positive input to output and negative input to output becomes unbalanced in delay, causing duty cycle distortion
Solution Approach 1:
The receiving amplifier is divided into two separate input stages: a first input stage receiving the positive input signal and a second input stage receiving the negative input signal. Each input stage is processed independently through its own delay path, allowing separate optimization and balancing of delay characteristics before the signals are combined at the output.
Solution Approach 2:
The patent intentionally introduces asymmetric delay compensation by cross-connecting the inputs through different paths. The first input stage output is connected to the second input stage input, and the second input stage output is connected to the first input stage input, creating deliberately asymmetric paths that compensate for the inherent asymmetry in the differential to single-ended conversion process.
2Reliability
If the input stages are replicated and cross-connected to balance delay, then duty cycle distortion is reduced, but the device complexity increases
Solution Approach 1:
The outputs of the first and second input stages are combined through a summing node to produce the single-ended output signal. This merging approach allows the benefits of two separate balanced delay paths to be combined into a single output, achieving duty cycle distortion reduction without requiring completely separate amplifier circuits.
Solution Approach 2:
The input stages are replicated to create matching delay paths. By copying the structure and characteristics of one input stage to the other, the patent ensures that both paths have identical delay characteristics, which when cross-connected, provide balanced overall delay compensation.
Data Source
AI summary
A differential amplifier replicates the input stage and cross-connects the inputs, so that the input-to-output delay will be balanced in an averaged sense. The outputs of each of the two input stages are then summed after an open loop delay matched inversion has taken place. The result is a reduction in the duty cycle distortion of the receiver amplifier over process voltage and temperature (PVT) variation. This is enabled by the fact that a full swing CMOS delay cell can be made to have good delay matching over PVT, whereas the input stage to a differential amplifier may, depending on architecture, have poor delay matching because of impedance mismatches within the amplifier.