Differential Amplifier Gain Control Without Operating Point Shift
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional amplifiers face limitations in increasing gain variability while maintaining linearity, as changing degeneration resistance affects the DC operating point and requires larger transistors, leading to increased chip size and parasitic capacitance issues.
Innovation Solution
The amplifier employs a linearity improving transistor circuit with variable transistor sizes to adjust degeneration, combined with an operating point adjusting transistor circuit to maintain a constant operating point, using control signals to switch transistors on/off and achieve variable degeneration without altering the operating point.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a resistance value of a degeneration resistance is changed to adjust the amount of degeneration, then linearity is improved, but the DC operating point changes
Solution Approach 1:
The patent introduces a control circuit as an intermediary that manages the degeneration resistance adjustment process. This control circuit coordinates the switching of transistor circuits to modify degeneration while simultaneously managing the operating point compensation, preventing direct disruption to the DC operating point when linearity is improved through degeneration adjustment.
Solution Approach 2:
The patent changes the resistance value parameter of the degeneration resistance by switching between different transistor circuits with different on-resistances. This allows continuous adjustment of the degeneration amount to improve linearity while the control circuit compensates for operating point shifts through coordinated transistor switching.
2Manufacturing precision
If the amount of degeneration is increased to improve linearity, then nonlinear distortion is reduced, but gain decreases
Solution Approach 1:
The patent makes the degeneration amount dynamic by providing multiple transistor circuits that can be switched on or off based on control signals. This dynamic configuration allows the system to adjust the degree of degeneration adaptively, optimizing the balance between linearity improvement and gain maintenance according to different operating conditions.
Solution Approach 2:
The patent segments the degeneration resistance function into multiple transistor circuits (first through fourth transistor circuits) with different on-resistances. This segmentation allows independent control of different degeneration levels, enabling selective activation of specific circuits to achieve desired linearity-gain trade-offs without permanently sacrificing gain.
3Adaptability or versatility
If a transistor with a large transistor size is used as degeneration resistance to increase gain variable range, then the variable range of gain is increased, but chip size increases and parasitic capacitance increases
Solution Approach 1:
The patent divides the degeneration resistance function into multiple smaller transistor circuits instead of using one large transistor. Each transistor circuit can be independently switched, allowing the system to achieve a wide variable range of gain by combining different circuits in series or parallel, thereby avoiding the need for a single large transistor that would increase chip size and parasitic capacitance.
Solution Approach 2:
The patent uses dynamic switching of multiple transistor circuits to achieve a large variable range of gain. By controlling which transistor circuits are active and how they are connected, the system can dynamically adjust the effective degeneration resistance to cover a wide gain range without requiring any single transistor to be excessively large, thus minimizing chip area and parasitic effects.
Data Source
AI summary
An amplifier of an embodiment includes: a plurality of input transistors of a plurality of differential pairs; a plurality of first resistance circuits mutually connecting respective sources of the input transistors corresponding to the differential pairs and mutually connecting the respective sources and reference potential points; a plurality of second resistance circuits being connected between the respective sources of the plurality of input transistors and the reference potential points, respectively; and a control circuit configured to generate a control signal controlling whether or not to electrically connect the plurality of first resistance circuits and the plurality of second resistance circuits to the respective sources of the input transistors.