Differential Amplifier Input Cancellation for Even Harmonic Distortion

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Solution Overview

Problem

Operational amplifiers (op-amps) suffer from even harmonic distortions due to parasitic capacitors in their input stages, which existing solutions fail to adequately mitigate.

Innovation Solution

Incorporating a buffer amplifier and a cancellation capacitor in the input stage, where the cancellation capacitor generates a cancellation current that cancels out the error current caused by parasitic capacitors, thereby eliminating even harmonic components. The capacitances of the cancellation and parasitic capacitors are made substantially equal or proportional to each other.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If a parasitic capacitor is present in the input stage of the operational amplifier, then the circuit structure is simple, but even harmonic distortions are generated due to error current

Engineering Contradiction:
Improvecircuit structure simplicityVSAvoideven harmonic distortions
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent introduces a cancellation capacitor that generates an equal and opposite current to the error current produced by the parasitic capacitor. By converting the harmful error current into a beneficial cancellation current, the even harmonic distortions are eliminated while maintaining the simplicity of the original circuit structure.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The cancellation capacitor is configured to produce a current that anticipates and counteracts the error current before it can cause harmonic distortions. This preliminary anti-action occurs through the deliberate design of the cancellation capacitor's current characteristics to oppose the parasitic capacitor's error current.

Inventive Principle:
Principle #9Preliminary anti-action

2Manufacturing precision

If a cancellation capacitor is added to eliminate even harmonic components, then linearity is improved, but device complexity increases

Engineering Contradiction:
Improvesignal linearityVSAvoidinput stage complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Instead of using complex active cancellation circuits, the patent employs a simple passive capacitor to achieve error current cancellation. This approach improves signal linearity while adding minimal complexity to the input stage, as the cancellation capacitor can be directly integrated into the existing circuit topology.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Object-generated harmful factors

If the capacitance of the cancellation capacitor is made equal to the parasitic capacitor, then even harmonic components are effectively cancelled, but sensitivity to capacitance variations increases

Engineering Contradiction:
Improveeven harmonic componentsVSAvoidcapacitance matching accuracy
Core Design Contradiction:
Object-generated harmful factorsVSMeasurement precision

Solution Approach 1:

The patent establishes a quantitative relationship between the cancellation capacitor and parasitic capacitor capacitances, allowing for systematic optimization. By defining the capacitance ratio as a design parameter, the solution enables precise control over cancellation effectiveness while accounting for manufacturing tolerances and process variations.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively removes even harmonic components from the input stage, improving the linearity of the op-amp's signal amplification by canceling the error current generated by parasitic capacitors.

Implementation Method 1

a cancellation capacitor coupled between the level shifter and the tail current source

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20190334490A1Differential amplifier including cancellation capacitors
Publication Date: 2019.10.31 TEXAS INSTRUMENTS INC
  • US20190334490A1 patent drawing
  • US20190334490A1 patent drawing
  • US20190334490A1 patent drawing

AI summary

In examples, a system comprises a differential amplifier coupled to a parasitic capacitor positioned between a first node and a first reference voltage source. The system comprises a buffer amplifier having an input terminal and an output terminal, the input terminal coupled to the first node and the output terminal coupled to a cancellation capacitor. The system includes a controlled current source coupled to the first node and the input terminal, the controlled current source coupled to a second reference voltage source. The system comprises a current sense circuit coupled to the cancellation capacitor and the second reference voltage source.