Differential Amplifier Layout Without Dummy Transistors

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Solution Overview

Problem

Existing differential amplifier layouts require dummy transistors for uniform etching, which increase parasitic resistance and size due to the need for separate regions for each transistor.

Innovation Solution

A layout method for a differential amplifier that eliminates the need for dummy transistors by dividing the first and fourth transistors into multiple regions, allowing even-numbered fingers to be disposed between and around transistors, forming current mirrors with common nodes and control signals, and using multi-finger transistors with parallel fingers for improved signal amplification.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If dummy transistors are inserted to ensure uniform etching, then manufacturing precision is improved, but parasitic resistance and device size increase

Engineering Contradiction:
Improveuniform etchingVSAvoidparasitic resistance
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent merges the function of dummy transistors with actual functional transistors by configuring the current mirror transistors (first, second, and third transistors) in a symmetric layout where all transistors undergo uniform etching processes. The dummy transistor functionality is integrated into the mirror current branch transistor rather than being added as a separate component, thereby achieving uniform etching without increasing parasitic resistance or device size.

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If dummy transistors are inserted to ensure uniform etching, then manufacturing precision is improved, but device size increases

Engineering Contradiction:
Improveuniform etchingVSAvoiddevice size
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent combines the etching reference function traditionally performed by separate dummy transistors with the functional mirror current branch transistor. By making the third transistor (mirror current branch) serve as both a functional component and an etching reference, the design achieves uniform etching across all transistors without requiring additional dummy transistor structures, thus avoiding increase in device size.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The third transistor in the current mirror is designed to serve dual purposes: it functions as a mirror current branch transistor for the amplifier operation and simultaneously serves as an etching reference structure for uniform pattern formation. This multi-functionality eliminates the need for dedicated dummy transistors, reducing overall device area while maintaining manufacturing precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of manufacture

If separate regions are used for each transistor, then ease of manufacture is improved, but device complexity increases

Engineering Contradiction:
Improveseparate regions for transistorVSAvoidlayout complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent merges the layout structures of multiple transistors into a unified symmetric configuration where the first, second, and third transistors are arranged in a current mirror topology with shared control nodes and symmetric finger arrangements. This integration reduces the number of separate regions needed while maintaining ease of manufacture through standardized current mirror fabrication processes.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8502604B2Layout method for differential amplifier and layout using the same
Publication Date: 2013.08.06 SAMSUNG ELECTRONICS CO LTD
  • US8502604B2 patent drawing
  • US8502604B2 patent drawing
  • US8502604B2 patent drawing

AI summary

A differential amplifier layout includes a current mirror having a first transistor, a second transistor, and a third transistor. The current mirror receives a first power supply through the first transistor. The second transistor is part of a reference current branch and the third transistor is part of a mirror current branch. The first transistor comprises a first group of fingers disposed adjacent one side of the second transistor and a second group of fingers disposed adjacent one side of the third transistor.