Differential Amplifier Using Negative Capacitance for Wider Bandwidth
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Solution Overview
Problem
High-speed optical transceivers face challenges in achieving low-power amplifiers with high bandwidth due to the need for large driving currents or voltage swings, which result in increased power consumption and decreased bandwidth, and existing equalization techniques like FFE and CTLE reduce low-frequency gain and stability, while inductive peaking increases chip area and costs.
Innovation Solution
An electrical amplifier design incorporating a negative impedance converter that applies negative capacitance to both the differential preamplifier and downstream amplifier stage to neutralize parasitic and load capacitance, enhancing bandwidth without significant stability issues and power penalties.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If large driving currents or large voltage swing are used to achieve high speed, then bandwidth is improved, but power consumption increases
Solution Approach 1:
The patent changes the impedance parameter of the amplifier output by introducing a negative impedance converter that generates negative capacitance. This parameter change allows the amplifier to drive the optical modulator effectively without requiring large current or voltage swing, thus achieving high bandwidth while maintaining low power consumption.
2Speed
If FFE or CTLE equalization techniques are used to extend bandwidth, then bandwidth is improved, but low-frequency gain is reduced
Solution Approach 1:
The patent introduces a negative impedance converter that changes the capacitive parameter at the amplifier output. This parameter change extends the bandwidth by compensating for parasitic capacitance effects without the need for equalization techniques that would compromise low-frequency gain.
3Speed
If NMC approach is used to cancel parasitic capacitance, then bandwidth is improved, but stability becomes an issue
Solution Approach 1:
The patent introduces a negative impedance converter as an intermediary component that generates negative capacitance to counteract parasitic capacitance. This intermediary approach provides bandwidth enhancement while maintaining circuit stability through controlled feedback mechanisms, avoiding the direct NMC instability issues.
4Speed
If inductive peaking is used to cancel parasitic capacitance, then bandwidth is improved, but chip area and cost increase
Solution Approach 1:
The patent replaces the physical inductor component with an electronic negative impedance converter that synthesizes the equivalent effect through active circuit elements. This substitution eliminates the need for large on-chip inductors, reducing chip area and cost while achieving the same bandwidth enhancement through negative capacitance generation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a large bandwidth with reduced stability concerns and minimal power consumption, outperforming traditional NMC approaches by accommodating higher gain values and reducing the need for large output buffers or gain stages, thus optimizing power efficiency and performance.
Implementation Method 1
a negative impedance converter is electrically located in at least one of said differential preamplifier and said downstream amplifier stage... use a negative capacitance that may neutralize not only the parasitic capacitance of the transistors of the preamplifier but also the load capacitance of the subsequent downstream amplifier stage
Data Source
AI summary
An exemplary embodiment of the invention relates to an electrical amplifier comprising a differential preamplifier having a first output port and a second output port; and a downstream amplifier stage having a first output unit and a second output unit; wherein the first output unit is connected to the first output port of the differential preamplifier and the second output unit is connected to the second output port of the differential preamplifier; and wherein a negative impedance converter is electrically located in at least one of said differential preamplifier and said downstream amplifier stage.