Differential Amplifier Offset Trimming With Switched Parallel Transistors
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Solution Overview
Problem
Existing differential amplifier circuits face challenges in achieving symmetric configuration and compensating for production differences and external wiring variations, leading to offset output voltage issues.
Innovation Solution
A monolithically integrated circuit with a differential amplifier and control circuit, featuring series connections of transistors and semiconductor switches, allows for parallel connection of transistors with varying gate widths to adjust offset output voltage, thereby compensating for asymmetry and fabrication variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a symmetric configuration is used in the differential amplifier, then production differences and external wiring variations are compensated, but offset output voltage issues arise due to fabrication variations
Solution Approach 1:
The patent applies asymmetry by introducing a compensating transistor with a different gate width than the amplifier transistors. This compensating transistor is connected in parallel with the first amplifier transistor and has a gate width specifically designed to compensate for offset output voltage. The asymmetry in the compensating transistor's dimensions allows it to counteract the effects of fabrication variations and maintain precise output voltage despite the otherwise symmetric differential amplifier configuration.
2Manufacturing precision
If transistors with varying gate widths are connected in parallel, then offset output voltage is adjusted, but device complexity increases
Solution Approach 1:
The patent applies local quality by introducing a compensating transistor with specific, localized properties (different gate width) only in the first branch of the differential amplifier. This compensating transistor is connected in parallel with the first amplifier transistor and has dimensions specifically tailored to compensate for offset output voltage. This localized modification allows precise adjustment of offset output voltage without requiring changes to the entire circuit architecture, thereby limiting the increase in device complexity to a minimal, targeted area.
3Manufacturing precision
If a compensating transistor is added to the differential amplifier, then offset output voltage is corrected, but the number of circuit elements increases
Solution Approach 1:
The patent applies merging by integrating the compensating transistor into the existing differential amplifier structure. The compensating transistor is connected in parallel with the first amplifier transistor, effectively merging its function with the amplification function. This integration allows the compensating transistor to perform dual roles: maintaining the amplification function while simultaneously compensating for offset output voltage, thereby correcting manufacturing precision issues without requiring a completely separate compensation circuit.
4Manufacturing precision
If external bias voltages are used for correction, then offset output voltage is adjusted, but integration on semiconductor chip becomes difficult
Solution Approach 1:
The patent applies self-service by designing a compensating transistor that automatically compensates for offset output voltage based on its inherent electrical properties. The compensating transistor is configured with a specific gate width that enables it to self-adjust and counteract offset errors without requiring external control voltages or additional biasing circuits. This self-compensating mechanism allows the entire differential amplifier with compensation to be monolithically integrated on a semiconductor chip, eliminating the need for external components while maintaining manufacturing precision.
Data Source
AI summary
A circuit and an adjusting method with a differential amplifier and with a control circuit, wherein the differential amplifier has a first amplifier transistor which for amplifying an input signal of the differential amplifier is connected in a first branch of the differential amplifier, wherein the differential amplifier has a second amplifier transistor which for amplifying the input signal of the differential amplifier is connected in a second branch of the differential amplifier, wherein the differential amplifier has at least one first series connection with a first transistor and a first semiconductor switch, the amplifier being connected parallel to the first amplifier transistor, wherein the differential amplifier has at least one second series connection with a second transistor and a second semiconductor switch, the amplifier being connected in parallel to the second amplifier transistor, and wherein the control circuit is connected to the switch inputs of the semiconductor switches to control the switching states of the semiconductor switches.