Differential Power Amplifier Layout for Symmetrical Phase Shifter Impedance
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Solution Overview
Problem
Current power amplification devices face challenges in supporting higher frequencies and outputs, particularly in achieving symmetrical impedance in phase shifters to maintain suitable amplification characteristics.
Innovation Solution
A power amplification device configuration featuring a substrate with chip devices mounted on it, including first and second differential amplifiers with carrier and peak amplifiers disposed in specific directions to lower phase shifter impedance and achieve symmetrical impedance between phase shifters, allowing for higher frequency and output support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the power amplification device supports higher frequency and output, then the frequency and output capabilities are improved, but the impedance symmetry of phase shifters deteriorates
Solution Approach 1:
The patent applies asymmetry by intentionally designing different impedance values for the first phase shifter and second phase shifter. Specifically, the first phase shifter has a first impedance value while the second phase shifter has a second impedance value that is different from the first. This asymmetric impedance design allows each phase shifter to be optimized for its specific position in the differential amplifier circuit, enabling the overall system to achieve better performance at higher frequencies and output power levels while maintaining adequate impedance matching in each branch.
2Speed
If the power amplification device supports higher frequency, then the frequency capability is improved, but the amplification characteristics deteriorate
Solution Approach 1:
The patent applies local quality by optimizing different parts of the circuit with different impedance characteristics. The first phase shifter and second phase shifter are designed with different impedance values tailored to their specific locations and functions within the differential amplifier. This localized optimization allows each phase shifter to perform optimally at higher frequencies, thereby maintaining reliable amplification characteristics across the entire operating range while supporting higher frequency operation.
Data Source
AI summary
A substrate and a chip device mounted on a main surface of the substrate are provided. The chip device is provided with a first differential amplifier including a first carrier amplifier and a second carrier amplifier, and a second differential amplifier including a first peak amplifier and a second peak amplifier. In the chip device, the first carrier amplifier and the second carrier amplifier are disposed side by side in a first direction, the first carrier amplifier and the first peak amplifier are disposed side by side in a second direction different from the first direction, the first peak amplifier and the second peak amplifier are disposed side by side in the first direction, and the second carrier amplifier and the second peak amplifier are disposed side by side in the second direction.