Differential Capacitive ADC Front End for High-Voltage Inputs

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Solution Overview

Problem

Conventional analogue/digital converters (ADCs) face challenges in handling high-voltage signals due to limitations in breakdown voltage, leading to lower conversion rates and increased current consumption when implemented in high-voltage technology, and signal attenuation methods introduce ohmic loads and higher current consumption.

Innovation Solution

A fully differential analogue/digital converter arrangement using a differentially implemented capacitative voltage divider with programmable capacitor banks and a comparator, allowing for attenuation of high input voltages to suitable levels for processing, while maintaining low expense and minimizing current consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If high-voltage technology is used to handle large input voltages, then the converter can process signals with amplitudes exceeding conventional voltage ranges, but the conversion rate significantly decreases due to larger transistor dimensions required for higher breakdown voltages

Engineering Contradiction:
Improveinput voltage rangeVSAvoidconversion rate
Core Design Contradiction:
Adaptability or versatilityVSSpeed

Solution Approach 1:

The input voltage range is segmented into multiple programmable ranges through capacitor bank selection. Instead of using a single high-voltage converter design, the system divides the voltage handling into discrete segments (capacitor banks) that can be selectively activated based on the input signal amplitude, allowing the use of lower-voltage, faster transistors for each segment while maintaining overall high-voltage capability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The converter dynamically adjusts its voltage handling capability by programmatically selecting different capacitor bank configurations. This dynamic reconfiguration allows the system to adapt its effective voltage range and impedance characteristics in real-time, optimizing performance for different input signal conditions without requiring a fixed high-voltage design

Inventive Principle:
Principle #15Dynamics

2Adaptability or versatility

If signal attenuation is performed using a resistive voltage divider, then the input signal amplitude is reduced to within the permitted voltage range, but the voltage divider presents an ohmic load to the source and increases current consumption

Engineering Contradiction:
Improveinput voltage rangeVSAvoidcurrent consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent replaces the traditional resistive voltage divider (electrical resistance-based system) with a capacitive voltage divider system. This substitution eliminates the continuous ohmic load and associated current consumption while achieving the same voltage scaling function through capacitive division, where current is only drawn during switching transitions rather than continuously

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system changes the fundamental parameter used for voltage division from resistance to capacitance. By using programmable capacitor banks instead of fixed resistors, the voltage division ratio can be dynamically adjusted while maintaining high input impedance and minimal continuous current consumption, as capacitors block DC current and only conduct during charging/discharging phases

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If a high-voltage sampling switch is provided at the input without additional attenuator circuits, then the input voltage can be directly sampled, but a large number of high-voltage switches are required which have large space requirements and can damage the gate oxide of comparator input transistors

Engineering Contradiction:
Improvenumber of componentsVSAvoidcomparator input protection
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces programmable capacitor banks as intermediary elements between the high-voltage input and the comparator. These capacitors act as buffer elements that can be selectively connected to divide the voltage before it reaches the comparator inputs, protecting the sensitive transistor gate oxide while still allowing high-voltage signals to be processed through the sampling switches

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system performs preliminary voltage division through the capacitive divider network before the signal reaches the comparator stage. By pre-scaling the voltage through programmable capacitor selections, the potentially damaging high-voltage components are removed before the signal enters the comparator, preventing gate oxide damage while maintaining system simplicity

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables efficient processing of large input voltages with reduced current consumption and increased immunity to interference, as the capacitative voltage divider effectively attenuates signals without requiring additional amplifiers, maintaining high conversion rates.

Implementation Method 1

a differentially implemented capacitative voltage divider that can be connected to or disconnected from the differential input and that comprises at least two programmable capacitor banks

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7903018B2Analog/digital converter assembly and corresponding method
Publication Date: 2011.03.08 AUSTRIAMICROSYSTEMS AG
  • US7903018B2 patent drawing
  • US7903018B2 patent drawing
  • US7903018B2 patent drawing

AI summary

An analogue/digital converter arrangement and a method. A differential input voltage is converted by means of a differentially implemented capacitative voltage divider that comprises two programmable capacitor banks (3, 4), and with the aid of the comparator (6) into a digital output signal.