Differential Capacitor Calibration Circuit for Mismatch Compensation
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Solution Overview
Problem
Capacitor sensing components often exhibit mismatch variance due to non-ideality in manufacture and assembly, leading to performance issues that existing calibration methods struggle to fully address without increasing manufacturing costs.
Innovation Solution
A differential capacitor device and method that utilize a calibration capacitor assembly with programmable capacitors and adjustable voltage inputs to regulate differential signals, calculating and adjusting offset values to achieve precise calibration and minimize noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If capacitor sensing components are manufactured with high precision to minimize mismatch variance, then measurement precision is improved, but manufacturing cost increases
Solution Approach 1:
The patent applies preliminary action by performing calibration measurements before final product deployment. The system captures offset values and mismatch characteristics during manufacturing or initial operation, then uses these pre-acquired data to compensate for errors during actual sensing operations, eliminating the need for ultra-precise manufacturing while achieving high measurement accuracy
Solution Approach 2:
The patent changes parameters by introducing calibration voltages and offset compensation values that dynamically adjust the sensing output. By measuring offset values under known test conditions and applying corrective transformations to the sensed signals, the system compensates for manufacturing variations without requiring tighter manufacturing tolerances
2Measurement precision
If calibration circuits and components are added to compensate for manufacturing variations, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent merges the calibration function with the existing differential capacitor structure by using the same capacitor pairs for both sensing and calibration purposes. The calibration process reuses the differential amplifier and output terminals, combining multiple functions into existing components rather than adding separate calibration hardware
Solution Approach 2:
The patent applies universality by designing the differential capacitor structure to serve dual purposes: the same capacitor pairs and amplifier circuitry are used for both normal sensing operations and calibration measurements. The system can operate in either mode by switching input configurations, making the hardware multi-functional and reducing overall complexity
3Measurement precision
If differential capacitor structures are used to achieve high performance sensing, then measurement precision is improved, but susceptibility to manufacturing non-ideality increases
Solution Approach 1:
The patent implements feedback by measuring the offset values during calibration and using these measured values to compensate for errors in subsequent sensing operations. The system continuously monitors and corrects for mismatch variations by applying stored calibration data to adjust the differential output, creating a closed-loop error compensation mechanism
Data Source
AI summary
The differential capacitor device includes a differential capacitor sensing component, a calibration capacitor assembly and two output terminals. The differential capacitive sensing element has a common point terminal, a first non-common point terminal and a second non-common point terminal, and the common point terminal is configured to receive an input voltage. The calibration capacitor assembly has a first calibration capacitor and a second calibration capacitor, one terminal of the calibration capacitor assembly is coupled to the first non-common point terminal and the second non-common point terminal, and the other terminal of the calibration capacitor assembly is configured to receive a first calibration voltage and a second calibration voltage. The two output terminals are respectively coupled to the first non-common point terminal and the second non-common point terminal to output a first signal and a second signal.