Differential Clamp Circuit With Current Recirculation for ADC Outputs
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Solution Overview
Problem
Conventional differential clamp circuits for ADC drivers face limitations due to the use of PNP transistors, which have lower carrier mobility and speed, and require two control voltages, making it challenging to maintain common-mode voltages within a narrow band and ensuring ADCs do not overload.
Innovation Solution
The implementation of differential clamp circuits that recirculate current from one output to the other, using either low-side or high-side clamps, allowing for symmetrical clamping around the ADC's input common-mode voltage with only one control voltage, thereby eliminating the need for separate high-side and low-side clamp circuits and control voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If PNP transistors are used in conventional differential clamp circuits, then the circuit structure is simple, but the carrier mobility and speed are lower
Solution Approach 1:
The patent combines high-side and low-side clamp circuits into a single differential clamp circuit using a differential pair of transistors. This merging approach maintains circuit simplicity while enabling the use of high-speed NPN transistors, thereby resolving the contradiction between speed improvement and structural complexity.
Solution Approach 2:
The patent changes the transistor type from PNP to NPN in the differential pair, which fundamentally alters the carrier mobility parameter. NPN transistors have higher electron mobility compared to PNP hole mobility, directly improving clamping speed while the differential configuration maintains structural efficiency.
2Ease of operation
If separate high-side and low-side clamp circuits are used, then clamping control is precise, but the number of control voltages and circuit components increases
Solution Approach 1:
The differential clamp circuit uses a single control voltage applied to the bases of both transistors in the differential pair. This control voltage simultaneously performs both high-side and low-side clamping functions through the differential configuration, eliminating the need for separate control voltages and reducing overall circuit complexity.
Solution Approach 2:
The patent merges the functionality of separate high-side and low-side clamp circuits into a unified differential clamp structure. This consolidation reduces the number of independent control voltages from two to one, while maintaining precise clamping control through the differential transistor action.
3Productivity
If conventional clamp circuits are used, then the circuit design is straightforward, but bandwidth degradation occurs
Solution Approach 1:
The patent changes the transistor configuration from conventional single-ended clamping to a differential pair configuration. This parameter change in circuit topology reduces the capacitive loading effect and improves bandwidth by enabling faster charge and discharge cycles through the differential transistor action.
Solution Approach 2:
The differential clamp circuit dynamically responds to input signal conditions through the differential pair configuration. The circuit automatically adjusts its clamping action based on the differential input voltage, enabling faster response times and reduced bandwidth degradation compared to static conventional clamp designs.
Data Source
AI summary
Differential clamp circuits configured to recirculate the current in one clamp, either low-side clamp or high-side clamp, from one output of a differential signal to the other output of the differential signal are disclosed. Differential clamp circuits described herein may be particularly suitable for providing programmable clamps at differential outputs of an ADC driver and may be particularly beneficial to implement clamps that are symmetrical around an ADC's input common-mode voltage. Some differential clamp circuit described herein may advantageously present a smaller capacitive load at each output, thus reducing bandwidth degradation of the output stage. Furthermore, differential clamp circuits described herein may operate with only one control voltage, making it easier to limit the output excursions symmetrically around the default common-mode voltage.