Differential Comparator Circuit for Low-Voltage ADC Signal Swing
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Solution Overview
Problem
Existing analog to digital converters (ADCs) face limitations in converting analog signals with low voltage supplies and limited signal swing, leading to insufficient pixel swing and noise issues, particularly in image sensors.
Innovation Solution
A differential comparator circuit with a capacitive voltage amplifier of negative gain and capacitive dividers generates differential analog input signals, allowing for fixed common mode operation and reduced noise, compatible with low voltage supplies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional ADC with single-ended comparator is used, then the circuit can operate with simple structure, but the signal swing is limited by the supply voltage and noise performance deteriorates
Solution Approach 1:
The patent segments the single comparator into two separate comparators with differential architecture. Each comparator processes one differential input signal, allowing independent optimization of each path and enabling larger signal swing without increasing supply voltage, thus resolving the contradiction between signal swing range and circuit structure complexity
Solution Approach 2:
The patent transitions from single-ended to differential signaling, adding a dimensional aspect to the signal processing. By using differential voltages around a common-mode level, the signal can swing symmetrically above and below the common mode, effectively doubling the usable signal range without increasing supply voltage, while maintaining comparable circuit complexity through symmetric design
2Use of energy by moving object
If the supply voltage is reduced to achieve low power consumption, then power consumption decreases, but the signal swing capability is reduced
Solution Approach 1:
By transitioning to differential signaling with a common-mode voltage reference, the patent enables signals to swing symmetrically around a mid-rail level. This allows maximum signal swing to utilize the full supply range from ground to VDD, effectively doubling the peak-to-peak signal swing capability compared to single-ended operation, while operating at the same low supply voltage for reduced power consumption
Solution Approach 2:
The patent changes the operating parameters by introducing differential voltage modes and common-mode level shifting. This allows the signal representation to exploit the entire supply voltage range more efficiently, enabling larger signal swings at lower supply voltages without requiring increased power consumption
3Reliability
If a single-ended comparator is used, then the circuit implementation is simple, but noise performance and fixed pattern noise are problematic
Solution Approach 1:
The patent divides the signal processing into two symmetric differential paths, allowing noise rejection through differential cancellation. Common-mode noise affecting both paths equally is rejected by the differential comparison, significantly improving noise performance and reducing fixed pattern noise while maintaining practical circuit complexity through symmetric design
Solution Approach 2:
The patent converts the potential harm of process variations and noise into benefit by using differential architecture. Mismatches and noise that would affect a single-ended comparator are transformed into common-mode signals that are rejected by the differential comparison, turning sources of error into signals that can be systematically eliminated
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables increased signal swing and reduced noise, supporting operation with low voltage supplies and minimizing vertical fixed pattern noise in image sensors.
Implementation Method 1
a voltage amplifier of negative gain configured to receive an analog input signal and to generate an inverted analog input signal
Implementation Method 2
a first capacitive divider configured to generate a first signal as an average of the analog input signal and a first ramp signal; and a second capacitive divider configured to generate a second signal as an average of the inverted analog input signal and a second ramp signal
Data Source
AI summary
A differential comparator circuit includes a voltage amplifier of negative gain receiving an analog input signal and generating an inverted analog input signal. The analog input signal and the inverted analog input signal form differential analog input signals. A comparator input circuit includes a first capacitive divider to generate a first signal as an average of the analog input signal and a first ramp signal, and a second capacitive divider to generate a second signal as an average of the inverted analog input signal and a second ramp signal, with the first and second ramp signals being differential ramp signals. The comparator is configured to compare the first and second signals to generate a signal transition having a timing based on the input signal.