Single-Ended to Differential Converter With IM3 Cancellation
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Solution Overview
Problem
Existing single-ended-to-differential converters in communications receivers face challenges in achieving high linearity, particularly in reducing third-order inter-modulation products and improving the input-referred third-order intercept point (IIP3), which limits their performance in converting single-ended signals to differential signals effectively.
Innovation Solution
The design incorporates first and second input transistors with cascode and cascomp transistors, where the gates of the input transistors are coupled to a single-ended voltage and AC ground, respectively, and the cascode transistors are biased by a main current, with loading elements and auxiliary current sources to cancel inter-modulation products, enhancing linearity and frequency bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional single-ended-to-differential converter structures are used, then the device complexity is low, but the linearity (IIP3) is poor due to significant third-order inter-modulation products
Solution Approach 1:
The converter is divided into two independent current paths: a main path containing input transistors and cascode transistors for signal conversion, and an auxiliary path containing cascomp transistors for distortion cancellation. This segmentation allows each path to be optimized for its specific function, with the auxiliary path dedicated solely to generating cancellation signals for inter-modulation products.
Solution Approach 2:
The cascomp transistors in the auxiliary path act as intermediary elements that generate distortion signals specifically designed to cancel the inter-modulation products from the main path. These intermediary distortion signals are injected through current sources into the differential output nodes, serving as a mediator to eliminate the harmful third-order products without affecting the main signal conversion function.
2Manufacturing precision
If distortion cancellation techniques are implemented, then the linearity (IIP3) is improved, but the device complexity increases due to additional transistors and current paths
Solution Approach 1:
The main signal conversion function and the auxiliary distortion cancellation function are merged into a single integrated converter circuit. The auxiliary current path with cascomp transistors is combined with the main input path, sharing common biasing structures and output nodes. This merging allows distortion cancellation to be achieved without requiring separate external circuits, thereby limiting the increase in overall device complexity.
Solution Approach 2:
The auxiliary current path serves multiple functions: it generates distortion signals for cancellation, provides biasing for the cascomp transistors, and injects cancellation currents at the differential output nodes. The cascomp transistors themselves function both as active elements for distortion generation and as part of the overall current mirror structure, demonstrating multi-functionality that reduces the need for additional dedicated components.
3Speed
If cascode and cascomp transistors are used with main and auxiliary currents, then the frequency bandwidth (100 MHz - 900 MHz) is extended, but the use of energy increases due to additional current paths
Solution Approach 1:
The auxiliary current path operates with a smaller current magnitude compared to the main path, providing just enough distortion cancellation signal to achieve the desired IIP3 improvement. The auxiliary current sources are designed to supply sufficient cancellation current across the 100 MHz - 900 MHz bandwidth without excessive over-provisioning, thereby limiting power consumption while maintaining the required frequency response and linearity performance.
Data Source
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AI summary
Techniques for designing a highly differential single-ended-to-differential converter for use in, e.g., communications receivers. In an exemplary embodiment, an auxiliary current path including cascomp transistors is coupled to a main current path including input transistors and cascode transistors. The transistors are biased such that inter-modulation products generated by the auxiliary current path cancel out inter-modulation products generated by the main current path. In another exemplary embodiment, current source transistors for the main current path are adaptively biased depending on the level of the input signal received. In an exemplary embodiment, the techniques may be applied to designing a converter for interfacing a single-ended low-noise amplifier (LNA) output voltage with a differential mixer input in a communications receiver.