Differential Current Monitoring via Pulse Concatenation Fault Detection
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Solution Overview
Problem
Conventional differential current monitoring techniques require complex hardware, such as FPGAs, for accurate calculations, which is hardware-intensive and not efficient for real-time fault detection in power distribution systems.
Innovation Solution
A system utilizing a control module and nodes arranged in a daisy chain to monitor current from a bus to respective loads, where each node issues a pulse proportional to the current measured, allowing the control module to sum pulses and compare total current drawn to the input current, detecting faults through pulse duration analysis without the need for FPGAs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional digital arithmetic methods are used for differential current monitoring, then measurement precision is improved, but device complexity increases due to requirement of FPGAs
Solution Approach 1:
The patent replaces complex digital arithmetic systems (FPGAs) with an analog integration circuit that performs summation of current signals through physical integration. The control module uses analog-to-digital conversion of the integrated signal rather than complex digital processing, thereby maintaining measurement precision while dramatically reducing hardware complexity.
Solution Approach 2:
The patent transforms the approach by changing the parameter domain from direct digital arithmetic comparison to analog integration followed by threshold comparison. The integration circuit accumulates current differences over time, converting a precision-dependent instantaneous comparison into a tolerance-based threshold detection, which simplifies the required hardware while maintaining functional accuracy.
2Productivity
If complex FPGAs are used for real-time differential current calculation, then productivity is improved, but loss of energy increases
Solution Approach 1:
The patent replaces energy-intensive FPGA digital processing with a passive analog integration circuit that naturally accumulates current differences without active computation. The system only activates the microcontroller when the integrated signal exceeds a threshold, dramatically reducing average energy consumption while maintaining real-time fault detection capability through the always-active analog circuit.
Solution Approach 2:
The system uses continuous analog integration followed by periodic threshold checking rather than continuous digital processing. The microcontroller is activated only when the integrated differential current exceeds the threshold, creating a periodic activation pattern that maintains productivity while minimizing energy consumption during normal operation.
3Device complexity
If analog current summing is used, then device complexity is reduced, but measurement precision deteriorates
Solution Approach 1:
The patent introduces an integration circuit as an intermediary between the analog current inputs and the digital microcontroller. This intermediary performs the analog summation function with high precision, then presents a single integrated voltage signal to the ADC, combining the simplicity of analog processing with the precision of digital measurement without requiring complex FPGA logic.
Data Source
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AI summary
A system for differential current monitoring includes a control module (102) and a plurality of nodes (104, 106, 108) operatively connected to the control module. Each node is configured to monitor current from a bus to a respective load. The control module and nodes are configured to monitor current at each of the nodes, issue a pulse for each node, wherein the pulse has a duration that is proportional to current at the node, concatenate all of the pulses for the nodes to determine the total current drawn from the bus at the nodes, compare the total current drawn from the bus at the nodes to current input to the bus, and signal a fault condition if the total current drawn from the bus is not within a predetermined range of the current input to the bus.