Differential DAC Circuitry With Common-Node Resistors for Overvoltage

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Solution Overview

Problem

Differential circuitry in digital-to-analogue converters (DACs) faces issues with overvoltage, leading to errors and reduced lifespan due to increasing speeds and miniaturization of semiconductor devices, causing voltage levels at load nodes to vary excessively.

Innovation Solution

The implementation of differential circuitry with a succession of load nodes connected via divider impedances and common nodes connected via resistors or short-circuited, allowing for controlled current signals and reduced voltage variations through common impedances, providing overvoltage protection and improved performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If circuitry speed increases and device size miniaturizes, then productivity and integration density improve, but overvoltage damage and reliability deteriorate

Engineering Contradiction:
Improvecircuitry speedVSAvoidovervoltage damage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A common mode voltage detector is introduced as an intermediary component that monitors the common mode voltage at load nodes and triggers protective action when overvoltage conditions are detected, preventing damage to the circuitry while allowing high-speed operation to continue

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The protective circuitry detects overvoltage conditions before they cause damage and preemptively activates protection mechanisms, such as clamping or shutting down affected nodes, to prevent the harmful effects of overvoltage on miniaturized high-speed components

Inventive Principle:
Principle #9Preliminary anti-action

2Reliability

If overvoltage protection is added, then reliability improves, but device complexity increases

Engineering Contradiction:
Improveovervoltage protectionVSAvoidcircuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The overvoltage protection functionality is merged with the existing differential circuitry structure, where the common mode voltage detector and protection elements are integrated into the same circuit block, sharing common nodes and signal paths to minimize additional complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The common mode voltage detector serves multiple functions: it monitors common mode voltage levels, detects overvoltage conditions, and triggers protective actions, thereby providing comprehensive protection with a single multi-functional component rather than multiple separate protection circuits

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentEP4170911A1Differential circuitry
Publication Date: 2023.04.26 SOCIONEXT INC
  • EP4170911A1 patent drawingFigure 1
  • EP4170911A1 patent drawingFigure 2
  • EP4170911A1 patent drawingFigure 3

AI summary

Differential circuitry comprising first and second current paths each comprising a succession of first and further load nodes, each successive further load node connected to its preceding load node via a divider impedance; and first switching circuitry connected to the further load node or nodes of the first current path, and second switching circuitry connected to the further load node or nodes of the second current path, the first and second switching circuitry configured to control a magnitude of controllable current signals passing through the load nodes of the first current path and the second current path, respectively, wherein: the first load nodes of the first and second current paths comprise a first pair of load nodes, and the or each successive further load node of the first current path and its corresponding successive further load node of the second current path comprise a successive further pair of load nodes; the first pair of load nodes are connected to a first common node via respective first load impedances and the or each successive further pair of load nodes are connected to a successive further common node via respective further load impedances; the or each successive further common node is connected to its preceding common node; and the or at least one of the successive further common nodes is connected to its preceding common node via a resistor.