Differential DAC Element Matching for Lower Mismatch Noise

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Solution Overview

Problem

Conventional digital-to-analog converter (DAC) systems face challenges in achieving linearity due to mismatches among DAC elements, leading to code-dependent errors and unnecessary noise injection, particularly in high-performance applications where power and area efficiency are critical.

Innovation Solution

A system and method for dynamically selecting circuit elements using multiple selector signals for dynamic element matching (DEM), which eliminates the need for separate DC offset circuitry and utilizes a single bank of DAC elements, enabling true differential-output configurations that are both power and area efficient, and reduce thermal noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a conventional DWA algorithm is used to provide first-order mismatch noise shaping, then code-dependent errors are whitened and mismatch noise is reduced, but unnecessary noise is injected into the DAC output due to DC offset circuitry

Engineering Contradiction:
ImprovelinearityVSAvoidnoise injection
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and removes the DC offset circuitry from the conventional DWA algorithm implementation. By eliminating the separate DC offset addition stage, the invention prevents the injection of unnecessary thermal noise that occurs in conventional systems while maintaining the first-order mismatch noise shaping capability through the core DWA element rotation mechanism.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the DC offset function into the element selection logic itself. Instead of adding DC offset separately after DWA processing, the invention integrates the offset compensation directly into the dynamic element matching algorithm, allowing the same circuit path to handle both the signal and offset without requiring additional noise-generating circuitry.

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If separate DC offset circuitry is used in conventional DAC configurations, then signed input codes can be properly handled, but extra power is wasted and area is consumed

Engineering Contradiction:
Improvesigned code handlingVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent makes the DWA algorithm itself multi-functional by enabling it to handle both the dynamic element matching and DC offset compensation in a single processing stage. This eliminates the need for separate DC offset circuitry while maintaining the ability to properly process signed input codes, thereby reducing power consumption and circuit area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The invention enables the DWA algorithm to serve its own offset compensation needs without external assistance. By incorporating the offset handling capability directly into the element rotation logic, the system becomes self-sufficient, eliminating dedicated offset circuitry and its associated power and area costs.

Inventive Principle:
Principle #25Self-service

3Object-generated harmful factors

If two identical DACs are used to form a pseudo-differential DAC, then differential output is achieved, but the system is not power or area efficient and offset currents degrade signal-path noise performance

Engineering Contradiction:
Improvenoise performanceVSAvoiddual DAC configuration
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent merges the functionality of two separate DACs into a single DAC by implementing true differential output capability within one converter. The DWA algorithm is modified to directly generate differential output codes, eliminating the need for parallel DAC configurations and their associated offset current issues, thereby improving noise performance while reducing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

Instead of using two single-ended DACs and combining their outputs to achieve differential signaling, the invention inverts the approach by implementing true differential output generation within a single DAC. This reversal eliminates the need for offset current cancellation circuits and reduces the system to a single power-efficient converter.

Inventive Principle:
Principle #13The other way round (Inversion)

4Measurement precision

If conventional DWA algorithm is implemented with linear mapping of signed codes, then first-order mismatch noise shaping is achieved, but separate circuitry for DC offset is required which is not part of the DAC output signal

Engineering Contradiction:
Improvemismatch noise shapingVSAvoidseparate DC offset circuitry
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent combines the DC offset circuitry with the DAC output signal path by integrating offset compensation into the DWA algorithm itself. This merging eliminates separate offset addition circuitry while maintaining first-order mismatch noise shaping, as the offset handling becomes an inherent part of the element selection and rotation process.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP2941826B1Multiple output dynamic element matching algorithm with mismatch noise shaping for digital to analog converters
Publication Date: 2017.09.27 AVNERA CORP
  • EP2941826B1 patent drawingFigure 1
  • EP2941826B1 patent drawingFigure 2
  • EP2941826B1 patent drawingFigure 3

AI summary

A system and method dynamically selects digital-to-analog (DAC) circuit elements to provide a true differential-output delta-sigma (ΛΣ) DAC. The sign and magnitude m of a received N-b.it input code is determined. If the input code comprises a positive value, m + r circuit elements are selected from a plurality of circuit elements by a positive element selector, in which comprises a number of rotational elements, and r circuit elements are selected by a negative element selector. Each selected circuit element comprises a circuit, element that was not selected for an immediately preceding received input code and has a corresponding minimum usage count value. If the input digital code comprises a negative value, m + r circuit elements are selected by the negative element selector, and. r circuit elements are selected by tile positive element selector. The circuit elements are capable of being configured as positive or negative circuit elements.