Differential Dynamic Charge Pump Circuit Design
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Solution Overview
Problem
Existing differential charge pump circuits face challenges in creating high and low voltages without exceeding operational limits, which is crucial for effectively driving sensor elements like MEMS microphones, and they often result in transient currents and phase errors.
Innovation Solution
A cascaded two-stage differential dynamic charge pump circuit is designed, utilizing a dynamic input clock signal to generate voltages greater than the supply voltage and less than ground level, with a unique configuration of transistors and capacitors that allow for high and low voltage creation within safe operational limits, and a constant gate voltage for the second stage to prevent voltage threshold exceedance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If conventional charge pump circuits are used to generate high and low voltages, then voltage generation capability is improved, but transistor terminal voltage limits are exceeded
Solution Approach 1:
The charge pump circuit is divided into multiple stages (first charge pump stage and second charge pump stage), where each stage generates a portion of the required voltage swing. This segmentation allows the total voltage to be built incrementally without any single transistor terminal exceeding its maximum voltage rating, thus resolving the contradiction between voltage generation capability and transistor operation safety.
Solution Approach 2:
The patent introduces a time dimension to voltage generation by using phased clock signals (CLK1, CLK2, CLK3, CLK4) that are sequentially activated. Instead of generating the full voltage swing simultaneously, the voltage is built up over multiple clock cycles through capacitive charging and discharging, allowing high voltage generation while keeping instantaneous voltage differences across any single transistor within safe limits.
2Productivity
If dynamic voltage switching is used to drive sensor elements, then driving capability is improved, but transient currents increase
Solution Approach 1:
The circuit pre-charges capacitors (C1-C4) during specific clock phases before the actual voltage switching occurs. This preliminary charging action ensures that when voltage transitions are needed to drive the sensor element, the capacitors are already prepared, reducing the magnitude of transient currents that would otherwise occur during abrupt voltage changes.
Solution Approach 2:
The charge pump operates with periodic clock signals that systematically charge and discharge capacitors in a controlled sequence. This periodic action converts what would be large transient currents into smaller, distributed current pulses occurring at regular intervals, reducing the peak transient current while maintaining the ability to drive the sensor element effectively.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The circuit effectively provides a differential output that can drive sensor elements by creating voltages up to twice the supply voltage and below ground level, reducing transient currents and phase errors, while ensuring safe operational conditions for the transistors.
Implementation Method 1
a first charge pump 6 for generating a positive voltage (above the supply voltage) and a lower charge pump 7 for generating a negative voltage (below the ground level voltage)
Implementation Method 2
The first charging stage 2 comprises an upper charge pump 6 for generating a positive voltage (above the supply voltage) and a lower charge pump 7 for generating a negative voltage (below the ground level voltage)
Data Source
Figure 1~4
Figure 2
Figure 5~7
AI summary
A differential dynamic charge pump circuit comprising; a first charging stage in series with a second charging stage; the first charging stage comprising a first circuit input for receiving an alternating clock signal; a second circuit input for receiving an inverted version of the alternating clock signal; a first output inverter arrangement configured to receive output voltages from upper and lower charge pump arrangements and having a first output and a second output for providing a dynamic differential output; the second charging stage comprising a first input and a second input configured to receive the output signal from the first stage; a second output inverter arrangement configured to receive output voltages from upper and lower charge pump arrangements and having a first output and a second output for providing a dynamic differential output of the circuit; wherein the first output inverter arrangement includes a first pair of transistors to control the voltage applied to the first output and a second pair of transistors configured to control the voltage applied to the second output, wherein gate terminals of the first pair of transistors and gate terminals of the second pair of transistors are configured to be dynamically controlled; and the second output inverter arrangement includes a first pair of transistors to control the voltage applied to the first output and a second pair of transistors configured to control the voltage applied to the second output, wherein a first transistor of the first pair of transistors and a first transistor of the second pair of transistors include a gate terminal and is configured to receive a first non-alternating voltage and a second transistor of the first pair of transistors and a second transistor of the second pair of transistors include a gate terminal configured to receive a second non-alternating voltage lower than the first non-alternating voltage.