Differential Hardmasks for Self-Aligned Via Patterning
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Solution Overview
Problem
The scaling of via features in integrated circuits poses challenges such as overlay control, critical dimension scaling, and resolution limitations in lithographic processes, particularly at pitches below 70 nanometers and critical dimensions below 35 nanometers, leading to increased costs and complexity in manufacturing.
Innovation Solution
The use of differential hardmasks that alter the sensitivity of electrobuckets to electron beam or EUV exposure, allowing for selective patterning and reduced risk of unwanted via openings by differentiating the reactivity of hardmask materials, thereby improving edge placement error tolerance and reducing the need for precise alignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If conventional lithographic processes are used to pattern small vias, then via pitch and critical dimension can be reduced, but overlay control and manufacturing precision deteriorate
Solution Approach 1:
The patent segments the hardmask layer into two distinct layers: a first hardmask layer and a second hardmask layer. This segmentation allows each layer to serve different functions - the first layer provides the base pattern while the second layer enables selective removal of electrobuckets. By dividing the patterning function across multiple layers, the process achieves better overlay control and manufacturing precision at reduced via pitches
Solution Approach 2:
The patent applies preliminary action by forming electrobuckets (filled photoresist) in all potential via locations before selective removal. The differential hardmask layers are prepared in advance with different sensitivities to e-beam or EUV radiation. This preliminary structuring allows subsequent selective exposure and removal processes to achieve precise via patterning with improved overlay control
2Length of moving object
If via critical dimensions are reduced, then device density increases, but lithographic resolution capabilities are exceeded
Solution Approach 1:
The patent applies local quality by creating hardmask regions with different radiation sensitivities at different locations. The first hardmask layer and second hardmask layer have differentiated properties - one is more sensitive to e-beam or EUV radiation while the other is less sensitive. This local differentiation in material properties enables selective patterning at reduced critical dimensions that exceed conventional lithographic resolution capabilities
Solution Approach 2:
The patent changes the sensitivity parameter of the hardmask materials to different values. By selecting hardmask materials with different sensitivities to e-beam or EUV radiation, the process enables selective removal of electrobuckets based on local sensitivity differences. This parameter change allows patterning at critical dimensions below the resolution limit of conventional lithography
3Manufacturing precision
If photoresist LWR and CDU characteristics are improved, then via critical dimension uniformity increases, but photoresist performance does not improve rapidly enough
Solution Approach 1:
The patent introduces differential hardmask layers as intermediary structures between the photoresist electrobuckets and the final via pattern. These hardmask layers with different radiation sensitivities act as mediators that enable selective removal processes. This intermediary approach improves critical dimension uniformity by providing a controlled mechanism for selective electrobucket removal that is not limited by photoresist LWR and CDU improvement rates
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables more robust and efficient via fabrication with improved edge placement error tolerance and reduced risk of undesired openings, simplifying the manufacturing process and reducing costs by allowing for self-aligned conductive vias and larger critical dimensions while maintaining error control.
Implementation Method 1
The first and second hardmask portions provide for different extents of back scatter and generation of secondary electrons into electrobuckets formed thereon
Implementation Method 2
alter the sensitivity of electrobuckets to electron beam or EUV exposure
Data Source
AI summary
Approaches based on differential hardmasks for modulation of electrobucket sensitivity for semiconductor structure fabrication, and the resulting structures, are described. In an example, a method of fabricating an interconnect structure for an integrated circuit includes forming a hardmask layer above an inter-layer dielectric (ILD) layer formed above a substrate. A plurality of dielectric spacers is formed on the hardmask layer. The hardmask layer is patterned to form a plurality of first hardmask portions. A plurality of second hardmask portions is formed alternating with the first hardmask portions. A plurality of electrobuckets is formed on the alternating first and second hardmask portions and in openings between the plurality of dielectric spacers. Select ones of the plurality of electrobuckets are exposed to a lithographic exposure and removed to define a set of via locations.