Differential Input Circuit With CMFB for Duty Cycle Stability
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Solution Overview
Problem
Current semiconductor interface schemes, particularly those using Current Mode Logic (CML)-type drivers, suffer from duty cycle amplification and susceptibility to common mode noise, leading to distorted differential input signals and constant power consumption.
Innovation Solution
An integrated circuit design that includes a voltage level detecting unit, a bias generating unit, a differential amplifying unit, and a signal stabilizing unit, utilizing Common Mode Feedback (CMFB) and AC Coupled Interconnection (ACCI) characteristics to minimize duty ratio distortion and power consumption while maintaining stable operations against common mode noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a CML-type driver is used for high-speed operation, then operation speed is improved, but duty cycle distortion occurs and the circuit becomes susceptible to common mode noise
Solution Approach 1:
The patent implements a common mode feedback circuit that detects the common mode voltage level of differential signals and adjusts bias voltages to compensate for deviations. This feedback mechanism maintains stable common mode voltage levels despite noise interference, ensuring reliable signal detection while preserving duty cycle accuracy during high-speed operation
Solution Approach 2:
The patent dynamically adjusts bias voltage parameters in response to detected common mode voltage variations. By changing the bias voltage level adaptively, the circuit compensates for common mode noise effects and maintains optimal operating conditions for high-speed signal transmission with minimal duty cycle distortion
2Speed
If a CML-type driver is used for high-speed operation, then operation speed is improved, but power consumption increases
Solution Approach 1:
The patent employs dynamic power management by selectively activating circuit components based on operational requirements. The common mode feedback circuit and bias adjustment mechanisms are activated only when needed to correct signal levels, allowing the main CML driver to operate at full speed while minimizing unnecessary power consumption during normal high-speed operation
3Reliability
If common mode feedback is implemented to stabilize voltage levels, then resistance to common mode noise is improved, but device complexity increases
Solution Approach 1:
The patent designs the common mode feedback circuit to perform multiple functions: detecting common mode voltage levels, generating correction signals, and adjusting bias voltages. By consolidating these functions into a single integrated circuit block, the patent reduces overall device complexity while maintaining effective common mode noise resistance
Data Source
AI summary
An integrated circuit includes an input unit and a voltage level detecting unit. The input unit is configured to output differential amplification signals corresponding to differential input signals in response to a voltage level detection signal. The voltage level detecting unit is configured to detect a voltage level of the differential amplification signals and output the voltage level detection signal.