Differential I/O Quad Layout for Dense VLSI Noise Suppression
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Very-large-scale integration (VLSI) integrated circuits face challenges in maintaining high signal integrity due to increased complexity and noise interference from densely arranged I/O structures, which traditional methods like spacing adjustments and shielding can only partially address, especially at higher frequencies.
Innovation Solution
The implementation of novel perpendicular quad (PNQ) and triangular quad (TNQ) geometries for arranging differential pairs of I/O structures, where one pair is placed on or near the perpendicular bisector of its adjacent pair, exploits field cancellation to eliminate noise without the need for added spacing or shielding, allowing for arbitrarily small spacings and extension into chains and arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If traditional spacing methods are used to reduce noise coupling between adjacent I/O structures, then noise interference is reduced, but the I/O structure density and circuit complexity increase
Solution Approach 1:
The patent applies asymmetry by arranging differential pairs in perpendicular quads where adjacent pairs are oriented at 90 degrees to each other rather than in parallel. This asymmetric geometric arrangement causes noise fields from adjacent pairs to cancel each other out, reducing noise interference without requiring increased spacing between structures.
Solution Approach 2:
The patent transitions from traditional parallel arrangement (one-dimensional spacing) to perpendicular quad arrangement (introducing a second dimension of orientation). By arranging differential pairs in perpendicular quads with pairs oriented at right angles, the invention exploits spatial dimensionality to achieve noise cancellation while maintaining high density.
2Object-affected harmful factors
If shielding structures are added to reduce noise coupling between adjacent I/O structures, then noise interference is reduced, but the device complexity and component count increase
Solution Approach 1:
The patent converts the harmful noise fields generated by adjacent differential pairs into a beneficial effect. By arranging pairs in perpendicular quads, the noise fields from adjacent pairs naturally cancel each other out, transforming the harmful electromagnetic interference into a self-cancelling system that reduces noise without additional shielding components.
Solution Approach 2:
The perpendicular quad arrangement enables the I/O structures to self-shield against noise. The geometric configuration causes adjacent differential pairs to automatically cancel their own noise fields, eliminating the need for external shielding structures and allowing the system to protect itself from interference.
3Productivity
If I/O structures are arranged in dense arrays to increase circuit capacity, then circuit functionality is improved, but signal integrity deteriorates due to increased coupling
Solution Approach 1:
The patent uses asymmetric perpendicular arrangement of differential pairs within dense I/O arrays. This asymmetric geometry ensures that even when I/O structures are densely packed, adjacent pairs oriented at 90 degrees to each other produce cancelling noise fields, maintaining signal integrity while enabling high circuit capacity.
Solution Approach 2:
The patent maintains high circuit capacity by arranging I/O structures in dense two-dimensional arrays, but preserves signal integrity by introducing perpendicular orientation in the vertical dimension. This multi-dimensional arrangement allows dense packing while the perpendicular geometry provides automatic noise cancellation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively suppresses noise interference between adjacent differential pairs, maintaining signal integrity without increasing complexity or requiring additional shielding, and can be integrated into various I/O structures and layouts.
Implementation Method 1
The geometries effectively place one differential pair on or near the perpendicular bisector of its adjacent differential pair, such that field cancellation and differential reception can substantially eliminate noise
Data Source
AI summary
Embodiments of the invention provide low-noise arrangements for very-large-scale integration (VLSI) differential input/output (I/O) structures (I/O pins, solder bumps, vias, etc.). Novel geometries are described for arranging differential pairs of I/O structures in perpendicular or near-perpendicular “quads.” The geometries effectively place one differential pair on or near the perpendicular bisector of its adjacent differential pair, such that field cancellation and differential reception can substantially eliminate noise without the need for added spacing or shields. By exploiting these effects, embodiments can suppress noise, independent of I/O structure spacing, and arbitrarily small spacings are permitted. Such arrangements can be extended into running chains, and even further into arrays of parallel chains. The parallel chains can be separated by supply structures (e.g., power supply bumps, or the like), and such supply structures can supply power to the I/O circuits of the IC, while also shielding adjacent chains from each other.