Differential Level Shift Circuit With Cross-Coupled Latching
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Solution Overview
Problem
Existing level shift circuits in LCD driving systems face challenges in efficiently generating high voltage outputs from lower voltage inputs for source drivers, as they often require complex configurations and may not effectively handle differential input signals within specific voltage ranges.
Innovation Solution
A level shift circuit comprising specific transistors and diode-connected transistors that generate level-shifted output signals by configuring NMOS and PMOS transistors to handle differential input signals, allowing outputs to be shifted to either the supply voltage VDDA or ground voltage VSSA based on input signal levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a differential input pair cascaded with a cross-coupled pair is used to shift voltage levels, then the output voltage level can be shifted to supply voltage levels, but the circuit complexity increases
Solution Approach 1:
The level shift circuit is divided into two independent but symmetrical halves, each handling one output signal. Each half contains a differential input transistor pair connected to a cross-coupled pair, allowing the circuit to process differential input signals and generate complementary output signals at different voltage levels independently, thereby managing complexity through modular segmentation
Solution Approach 2:
The circuit combines differential input signal processing with cross-coupled latch functionality in a single integrated structure. The differential input pair (transistors 202, 204) is directly cascaded with the cross-coupled pairs (transistors 206-211 and 213-218), merging signal differentiation and level shifting operations into one unified circuit block that efficiently transforms low-voltage differential inputs to high-voltage complementary outputs
2Reliability
If the first input signal is at logic high and second input signal is at logic low, then the output signals are latched to supply voltages, but the voltage range requirement for input signals becomes more restrictive
Solution Approach 1:
The circuit employs cross-coupled transistor pairs where the drain of one transistor connects to the gate of another, creating equipotential relationships that stabilize the latched output states. When the differential input signals drive the cross-coupled transistors, the outputs are pulled to equipotential levels (VDDA or VSSA), ensuring stable latching regardless of minor variations in input signal voltage levels within the acceptable range
Solution Approach 2:
The cross-coupled configuration provides positive feedback between transistor pairs, where the output of one transistor feeds back to control another transistor in the pair. This feedback mechanism reinforces the latched state once triggered by differential input signals, ensuring stable output levels at VDDA or VSSA and maintaining reliability even with varying input signal conditions within the specified voltage range
Data Source
AI summary
A level shift circuit includes: a first transistor coupled to a first reference voltage for receiving a first voltage input signal; a second transistor coupled to a second reference voltage; a first diode-connected transistor coupled between the second transistor and the first diode-connected transistor; a third transistor coupled to the first reference voltage and the second transistor, for receiving a second voltage input signal, wherein the first voltage input signal is an inverse version of the second voltage input signal; a fourth transistor coupled to the second reference voltage and the first transistor; a second diode-connected transistor coupled between the fourth transistor and the third transistor; and a fifth transistor coupled to the second voltage input signal, the first reference voltage, and the fourth transistor, wherein a level-shifted output signal corresponding to the first voltage input signal is generated at an output node of the fourth transistor.