Differential Level Shifter With AC/DC Feed-Forward Paths
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Solution Overview
Problem
In integrated circuit designs, there is a challenge in interconnecting transmitters and receivers with different common mode voltage requirements, while also providing a high-speed data path, which is hindered by PCB layout constraints and the need for AC coupling outside the IC.
Innovation Solution
A semiconductor die with a differential input conditioning stage and data communication processing circuit, featuring a level shifter and feed-forward paths to generate an internal common mode voltage independent of the input common mode voltage, and providing both AC and DC signal paths for improved bandwidth and noise immunity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If AC coupling is used outside the IC to accommodate different common mode voltage requirements, then compatibility between transmitters and receivers with different voltage standards is improved, but PCB layout complexity and device complexity increase
Solution Approach 1:
The patent introduces an intermediary circuit block within the IC that includes a level shifter and feed-forward paths. This intermediary structure translates between different common mode voltage standards (e.g., 1.2V to 2.5V) internally, eliminating the need for external AC coupling capacitors and complex PCB layouts while maintaining compatibility across different voltage domains
Solution Approach 2:
The patent merges the level shifting function and signal path functions into a single integrated circuit block. By combining the AC coupling capacitor, level shifter, and feed-forward paths within the IC, the design eliminates external components and simplifies PCB layout while maintaining the ability to handle different common mode voltage requirements
2Device complexity
If level shifter is integrated within the IC, then device complexity is reduced and PCB layout is simplified, but bandwidth and high-speed data transmission capability may be limited
Solution Approach 1:
The patent segments the signal path into multiple parallel paths: an AC coupled path for high-frequency signal transmission and a DC feed-forward path for low-frequency and common mode voltage translation. This segmentation allows each path to be optimized for its specific frequency range, maintaining high bandwidth while integrating the level shifter within the IC
Solution Approach 2:
The patent ensures continuous signal transmission across all frequency ranges by providing both AC coupled and DC feed-forward paths. The AC path handles high-frequency components while the DC path maintains signal integrity at lower frequencies, ensuring uninterrupted high-speed data transmission through the integrated level shifter
3Reliability
If both AC coupled path and DC feed-forward path are provided, then noise immunity and bandwidth are improved, but device complexity increases
Solution Approach 1:
The integrated circuit block performs multiple functions simultaneously: it provides AC coupling for high-frequency signals, DC feed-forward for low-frequency signals and common mode voltage translation, and level shifting between different voltage domains. This multi-functionality is achieved within a single unified circuit structure, reducing overall device complexity while improving noise immunity and bandwidth
Data Source
AI summary
A semiconductor die. The die comprises a level shifter coupled to a positive differential input and to a negative differential input comprising a first operational amplifier, wherein the first operational amplifier is configured to generate an internal common mode voltage coupled to a positive differential output and to a negative differential output, a positive alternating current (AC) coupled feed-forward path comprising a first capacitor coupled to the positive differential input and to the positive differential output, a negative AC coupled feed-forward path comprising a second capacitor coupled to the negative differential input and to the negative differential output, a positive direct current (DC) feed-forward path coupled to the differential input, to the internal common mode voltage sense node, and to the positive differential output, and a negative DC feed-forward path coupled to the differential input, to the internal common mode voltage sense node, and to the negative differential output.


