Differential Line Capacitor Module With Cavity for Impedance Control
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Solution Overview
Problem
Current electronic devices using differential signaling face challenges with parasitic coupling and space occupancy due to the use of multi-layer ceramic capacitors, which limit the number of capacitors that can be adjacently connected and complicate impedance tuning, leading to increased insertion losses and delay mismatch.
Innovation Solution
The use of a support with a separating region containing a cavity between capacitors, allowing for closer placement and reduced parasitic coupling, facilitated by 2D or 3D capacitors embedded in the support, with adjustable impedance through cavities filled with materials of varying permittivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MLCC capacitors are used with soldering pads to connect to differential lines, then DC isolation is achieved, but the number of capacitors that can be adjacently connected is limited due to critical distance requirements between soldering pads
Solution Approach 1:
The patent transitions from planar soldering pad connections to three-dimensional stacked capacitor connections. Capacitors are positioned vertically above each other on the same PCB trace, utilizing the Z-dimension to overcome the limited horizontal space. This allows multiple capacitors to be connected in series along a single differential line without requiring additional lateral space or complex pad arrangements.
Solution Approach 2:
The patent combines multiple capacitor connections into a single vertical stack location. Instead of spreading capacitors across multiple adjacent pads, the solution merges the connection point into one location where capacitors are stacked vertically and connected through vias to the same trace, simplifying the layout and reducing manufacturing constraints.
2Manufacturing precision
If capacitors are spread in a direction orthogonal to the signal direction to maintain constant gap width, then characteristic impedance is maintained, but the surface area occupied increases
Solution Approach 1:
The patent moves the capacitor arrangement from a horizontal spread layout to a vertical stack configuration. By positioning capacitors in the vertical dimension above the same PCB trace segment, the solution maintains the horizontal gap width constant while significantly reducing the surface area occupied by the capacitor array.
Solution Approach 2:
The patent applies different spatial arrangements to different parts of the capacitor assembly. The vertical stacking creates a localized concentration of capacitors in the Z-dimension while maintaining uniform horizontal spacing, allowing impedance control in the horizontal plane and compactness in the vertical plane.
3Area of stationary object
If capacitors are placed closer together to reduce surface area, then space occupancy is reduced, but parasitic coupling between capacitors increases
Solution Approach 1:
The patent resolves the parasitic coupling issue by separating capacitors in the vertical dimension rather than the horizontal dimension. The stacked configuration with vias connecting to the same trace maintains electrical isolation while minimizing horizontal proximity, thereby reducing parasitic coupling despite the compact footprint.
4Manufacturing precision
If the gap between differential lines is kept constant for impedance control, then characteristic impedance is maintained, but manufacturing process constraints make this difficult to achieve
Solution Approach 1:
The patent segments the differential line into multiple sections with capacitors inserted at specific points. By dividing the line and placing capacitors in vertical stacks at discrete locations, the solution allows the gap width to be maintained in critical sections while providing flexibility in other areas, making the design more manufacturable.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces parasitic coupling and maintains characteristic impedance, enabling efficient signal propagation while allowing for a single capacitor module to be adapted for different applications with varying impedance requirements.
Implementation Method 1
Because of the thickness of the capacitors 103, it has been observed that parasitic capacitors can appear between the capacitors 103 arranged as seen on the figure. This phenomenon, called parasitic coupling, has an impact on the differential characteristic impedance of a pair.
Implementation Method 2
In many devices, it is necessary to provide DC isolation or DC blocking between active circuits connected together and which may use different DC supply voltages. Typically, discrete capacitors are connected in series between two portions of the wires of the differential pair
Implementation Method 3
the support comprises a separating region between the two capacitors, the separating region comprising at least one cavity arranged between the two capacitors
Data Source
AI summary
An electronic device is provided that includes a board equipped with a pair of differential transmission lines that each have an opening extending between two line terminals. Moreover, the device includes a capacitor module that includes a support and two capacitors that each have two capacitor terminals, respectively, connected to the two line terminals of one line of the pair of transmission lines. In addition, the support includes a separating region between the two capacitors that has at least one cavity disposed between the two capacitors.