Differential Analog Neural Memory Array for Stable Weight Precision

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Solution Overview

Problem

Existing analog neural memory arrays face challenges with varying source impedance and power consumption across the array, leading to precision issues and susceptibility to noise during read, program, or erase operations.

Innovation Solution

The implementation of an analog neural memory system with non-volatile memory cells arranged in pairs of columns, where one column stores positive weights (W+) and the other negative weights (W-), allowing for differential weight calculation (W = W+ - W-) to maintain constant source impedance and power consumption across the array.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If memory cells are arranged in a conventional single-column array, then the array structure is simple, but the source impedance varies across the array leading to precision issues and noise susceptibility

Engineering Contradiction:
Improveweight storage precisionVSAvoidnoise susceptibility
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The memory array is segmented into differential column pairs, where each pair consists of a first column storing positive weights and a second column storing negative weights. This segmentation allows the system to maintain constant source impedance by balancing the charge distribution across paired columns, thereby improving measurement precision and reducing noise susceptibility.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Adjacent memory cells within the same differential column pair are configured to store weights with opposite polarities (positive and negative). This local quality differentiation ensures that the source impedance remains constant across the array, as the opposing charges in adjacent cells cancel out impedance variations, leading to improved precision and reduced noise.

Inventive Principle:
Principle #3Local quality

2Measurement precision

If memory cells are arranged in differential column pairs to maintain constant source impedance, then precision and noise immunity improve, but the array complexity increases

Engineering Contradiction:
Improveweight storage precisionVSAvoidarray structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent merges the storage of positive and negative weights into a unified differential column pair structure. By combining both polarities within adjacent columns of the same memory array, the design achieves constant source impedance without requiring separate arrays for positive and negative weights, thus managing complexity while improving precision.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory array is designed to perform multiple functions within a single structure: it stores both positive and negative weights, maintains constant source impedance, and provides noise immunity all through the differential column pair configuration. This multi-functionality reduces the need for additional specialized structures, managing overall complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Use of energy by stationary object

If conventional memory arrays are used, then the power consumption varies across bit lines during read operations, but implementing differential column pairs requires additional power management circuitry

Engineering Contradiction:
Improvepower consumption consistencyVSAvoidpower management complexity
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The differential column pair structure inherently balances power consumption across bit lines through its symmetric configuration. The opposing charges in adjacent columns naturally equalize the current draw during read operations, allowing the array to self-regulate power distribution without requiring complex external power management circuitry.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11600321B2Analog neural memory array storing synapsis weights in differential cell pairs in artificial neural network
Publication Date: 2023.03.07 SILICON STORAGE TECHNOLOGY INC
  • US11600321B2 patent drawing
  • US11600321B2 patent drawing
  • US11600321B2 patent drawing

AI summary

Numerous embodiments of analog neural memory arrays are disclosed. In one embodiment, an analog neural memory system comprises an array of non-volatile memory cells, wherein the cells are arranged in rows and columns, the columns arranged in physically adjacent pairs of columns, wherein within each adjacent pair one column in the adjacent pair comprises cells storing W+ values and one column in the adjacent pair comprises cells storing W− values, wherein adjacent cells in the adjacent pair store a differential weight, W, according to the formula W=(W+)−(W−). In another embodiment, an analog neural memory system comprises a first array of non-volatile memory cells storing W+ values and a second array storing W− values.