Differential Pair Inner-Side Impedance Compensation for Crosstalk
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Solution Overview
Problem
Existing differential pair designs on printed circuit boards face challenges in maintaining impedance characteristics and reducing return loss while minimizing crosstalk, particularly due to limited spacing in ball grid array pin fields, which affects signal integrity and transmission quality.
Innovation Solution
Implementing inner-side impedance compensation traces on both traces of a differential pair, aligned and routed only on the inner-side, to maintain impedance and reduce return loss, while minimizing crosstalk by optimizing trace widths and spacings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If traditional impedance compensation methods are used with traces routed on both inner-side and outer-side, then impedance characteristics are maintained, but crosstalk between differential pairs increases
Solution Approach 1:
The patent extracts the outer-side impedance compensation traces from the differential pair structure, retaining only the inner-side compensation traces. This removal eliminates the source of crosstalk between adjacent differential pairs while preserving the impedance matching function through the inner-side traces alone.
Solution Approach 2:
The patent introduces asymmetry by routing impedance compensation traces exclusively on the inner-side of the differential pair traces rather than symmetrically on both inner and outer sides. This asymmetric configuration reduces electromagnetic coupling between adjacent pairs while maintaining individual pair impedance characteristics.
2Area of stationary object
If trace spacing is reduced to accommodate more traces in limited space, then device density increases, but impedance control and signal quality deteriorate
Solution Approach 1:
The patent applies local quality by concentrating impedance compensation resources on the inner-side where they are most effective for both impedance control and crosstalk reduction. The compensation traces are strategically positioned and dimensioned to provide localized impedance correction without requiring increased overall trace spacing.
3Reliability
If inner-side impedance compensation traces are added to maintain impedance, then return loss is reduced, but device complexity increases
Solution Approach 1:
The patent uses a simplified copying approach where identical inner-side compensation trace configurations are replicated for each trace in the differential pair. This standardized replication maintains consistent impedance and return loss performance across all differential pairs without requiring complex unique designs for each pair.
Data Source
AI summary
An information handling system includes first and second differential pairs on a printed circuit board. The first differential pair includes first and second traces, and first and second sets of impedance compensation traces. The first impedance compensation traces are routed only on an inner-side of the first trace. The second impedance compensation traces are routed only on an inner-side of the second trace, and the first and second impedance compensation traces are substantially aligned. The second differential pair includes third and fourth traces and third and fourth sets of impedance compensation traces. The third set of impedance compensation traces are routed only on an inner-side of the third trace. The fourth impedance compensation traces are routed only on an inner-side of the fourth trace, and the third and fourth impedance compensation traces are substantially aligned.