Differential Phase Adder PLL for High-Frequency Phase Coherence
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Solution Overview
Problem
Existing phase adder circuits struggle to maintain high-quality phase coherence at high frequencies due to non-linear effects and the difficulty in realizing ideal single-side-band analog multipliers, leading to phase errors and spurious signals in phased arrays.
Innovation Solution
The development of high-quality Phase Adder circuits using differential multiplier circuits with triode interface configurations and phase locked loops, which include balanced differential mixer circuits, loop filters, and voltage-controlled oscillators, to generate a uniform timing reference across phased arrays, reducing phase errors and spurious signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional analog multipliers are used at high frequencies, then signal multiplication is achieved, but non-linear effects generate spurious signals and phase errors
Solution Approach 1:
The patent divides the analog multiplier function into two separate stages: a double-side-band analog multiplier that performs the core multiplication, and a subsequent single-side-band filter that removes spurious signals. This segmentation allows each stage to be optimized independently, enabling high-frequency operation while maintaining signal purity by eliminating non-linear distortion products.
Solution Approach 2:
The patent introduces an intermediary single-side-band filter between the analog multiplier and the output. This intermediary component acts as a mediator that removes harmful spurious signals generated by the multiplier's non-linear effects, thereby resolving the contradiction between achieving signal multiplication at high frequencies and eliminating generated harmful factors.
2Manufacturing precision
If double-side-band analog multipliers are used, then signal multiplication is achieved, but removing one side band introduces additional phase errors
Solution Approach 1:
The patent changes the operational parameters of the analog multiplier by carefully controlling the local oscillator frequency and phase relationships. By adjusting these parameters, the desired single-side-band output is achieved while minimizing the introduction of additional phase errors during the side-band removal process.
Solution Approach 2:
The patent employs feedback mechanisms in the form of phase-locked loops that monitor and correct phase deviations introduced during side-band removal. This feedback ensures that the final output maintains high phase coherence despite the complexity of the side-band filtering process.
3Reliability
If phase adders operate close to ideal S-Clients, then phase coherence is improved, but the quality requirements become more stringent and difficult to achieve
Solution Approach 1:
The patent segments the phase addition function into distinct modular components: signal distribution networks, double-side-band multipliers, single-side-band filters, and phase-locked loops. This modular segmentation allows each component to be designed and optimized independently, making it easier to achieve high phase coherence while managing quality requirements through specialized design of each module.
Solution Approach 2:
The patent introduces intermediary components such as buffer amplifiers and impedance matching networks between the phase adder stages. These intermediaries act as mediators that isolate and protect the critical phase addition function from variations and imperfections in other parts of the system, thereby improving phase coherence while relaxing the stringency of quality requirements for individual components.
Data Source
AI summary
An electronic circuit including: a differential multiplier circuit with a first differential input and a second differential input and a differential output; and a phase locked loop (PLL) circuit including: (1) a balanced differential mixer circuit with a first differential input electrically connected to the differential output of the differential multiplier circuit, a second differential input, and an output; (2) a loop filter having an output and an input electrically connected to the output of the balanced differential mixer circuit; and (3) a voltage controlled oscillator (VCO) circuit having an input electrically connected to the output of the loop filter and with an output electrically feeding back to the second differential input of the balanced differential mixer circuit.