Differential Phase Mixer Circuit for Duty Cycle and Step Linearity

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Solution Overview

Problem

Traditional single stage phase mixer circuits suffer from duty cycle variation and non-linearity of step size, affecting the performance of memory devices by causing significant deviations in data eye availability and uniform delay application.

Innovation Solution

The implementation of differential phase mixer circuits, which include phase mixer circuits configured to receive input signals with phase differences and control signals to weight and interpolate these signals, resulting in reduced duty cycle variation and increased linearity of step size without increasing power consumption or input/output delay time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If traditional single stage phase mixer circuits are used, then the circuit structure is simple, but duty cycle variation and non-linearity of step size occur, affecting performance

Engineering Contradiction:
Improvecircuit structureVSAvoidduty cycle variation
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The phase mixer circuit is divided into multiple stages, with each stage contributing to the overall phase mixing function. This segmentation allows for better control of duty cycle variation and step size linearity while distributing the complexity across manageable units.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different stages of the phase mixer are designed with specific local characteristics optimized for their function. Each stage has tailored inverter configurations and control signal weightings that address specific aspects of duty cycle correction and phase interpolation precision.

Inventive Principle:
Principle #3Local quality

2Device complexity

If traditional single stage phase mixer circuits are used, then the circuit structure is simple, but non-linearity of step size occurs, affecting uniform delay application

Engineering Contradiction:
Improvecircuit structureVSAvoiduniformity of step size
Core Design Contradiction:
Device complexityVSStability of the object's composition

Solution Approach 1:

The phase mixer employs dynamic control signals that adjust the weighting of input phases based on the desired output phase. This dynamic adjustment ensures uniform step size linearity across the entire phase range, with each stage contributing proportionally to the phase interpolation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The multi-stage configuration inherently provides feedback mechanisms where the output of one stage influences the operation of subsequent stages. This feedback ensures that duty cycle variations are corrected and step size uniformity is maintained throughout the phase mixing process.

Inventive Principle:
Principle #23Feedback

3Manufacturing precision

If differential phase mixer circuits are implemented, then duty cycle variation is reduced, but power consumption may increase

Engineering Contradiction:
Improveduty cycle variationVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The differential phase mixer combines multiple input phases and control signals into a unified output through coordinated stage operation. By merging the functionality of multiple inverters and control paths, the circuit achieves duty cycle correction without proportionally increasing power consumption, as stages share common control infrastructure.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10312894B2Apparatuses and methods for providing a signal with a differential phase mixer
Publication Date: 2019.06.04 MICRON TECHNOLOGY INC
  • US10312894B2 patent drawing
  • US10312894B2 patent drawing
  • US10312894B2 patent drawing

AI summary

According to one embodiment, an apparatus is described. The apparatus comprises a first phase mixer circuit configured to receive a first signal and a second signal and provide a first intermediate signal having a phase between a phase of the first signal and a phase of the clock signal. The apparatus further comprises a second phase mixer circuit configured to receive a complement of the first signal and a complement of the second signal and provide a second intermediate signal having a phase between a phase of the complement of the first signal and a phase of the complement of the second signal, wherein the second intermediate signal is combined with the first intermediate signal at a node to provide an output signal.