Differential Programming Two-Terminal Resistive Memory Cells

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Solution Overview

Problem

Existing resistive-switching memory technologies face challenges in differential programming of two-terminal resistive switching memory cells, leading to invalid identifier bit values due to unexpected programming of memory cells.

Innovation Solution

The implementation of a differential programming process that detects program events in one cell and disconnects the second cell from the voltage source, using a detection circuit and termination circuit to prevent unwanted programming and ensure proper differential programming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If differential programming is applied to two-terminal resistive switching memory cells, then identifier bit values can be generated, but unexpected programming of memory cells occurs leading to invalid identifier bit values

Engineering Contradiction:
Improvevalidity of identifier bit valuesVSAvoidcontrol over programming of memory cells
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent divides the programming control into separate paths for first and second memory cells. By using distinct bitlines (first bitline and second bitline) and controlling them independently through detection circuits, the system segments the programming process to prevent unintended programming of the second cell when the first cell is being programmed.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements a detection circuit that monitors the programming state of the first memory cell and provides feedback control. When the detection circuit identifies that the first cell has been programmed, it triggers a response to disconnect the second cell from the voltage source, preventing unexpected programming and ensuring valid identifier bit values.

Inventive Principle:
Principle #23Feedback

2Duration of action of stationary object

If program soaking is applied to enhance programming robustness, then data longevity improves, but power consumption increases

Engineering Contradiction:
Improvedata longevityVSAvoidpower consumption during programming
Core Design Contradiction:
Duration of action of stationary objectVSUse of energy by stationary object

Solution Approach 1:

The patent applies program soaking by continuing to apply voltage to the first memory cell after it has been programmed, before disconnecting it. This preliminary extended programming action ensures robust programming and enhances data longevity by stabilizing the programmed state, while the second cell is simultaneously disconnected to prevent unnecessary power consumption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies excessive programming action (program soaking) selectively to only the first memory cell that needs robust programming, rather than applying continuous power to all cells. This partial application of excessive action achieves enhanced data longevity for the programmed cell while minimizing overall power consumption by disconnecting the second cell.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12272399B1Differential programming of two-terminal resistive switching memory with program soaking and adjacent path disablement
Publication Date: 2025.04.08 CROSSBAR INC
  • US12272399B1 patent drawing
  • US12272399B1 patent drawing
  • US12272399B1 patent drawing

AI summary

Differential programming of multiple resistive switching memory cells defining a bit is disclosed. The differential programming can mitigate invalid data values for the defined bit, referred to herein as an identifier bit. Embodiments of the present disclosure provide for detection of a program event(s) for a portion of resistive switching memory cells defining an identifier bit, and disconnecting a remainder of the memory cells from program supply voltage, prior to a duration of a program cycle. Additionally, the program cycle can be continued for the programmed memory cell(s) to facilitate a robust programming and enhance data longevity. The detection and subsequent disconnection can facilitate proper differential programming and mitigate unwanted program events that lead to invalid identifier bit results, as well as reducing power consumption for a program cycle of resistive switching memory.