Differential Resonant Clock Grid for Low-Skew Chip Timing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing clock distribution methods face challenges in maintaining low-skew and low-jitter global clock networks amidst process, voltage, and temperature variations, particularly as clock frequencies increase, and struggle with non-uniform phase and amplitude issues in standing-wave and traveling-wave distributions.

Innovation Solution

A distributed differential oscillator system utilizing resonant oscillators with inductors tuned to the clock signal frequency, coupled to a differential clock grid, which includes a gain element for energy storage and discharging, and uses injection locking and de-skewing circuits to maintain resonance and phase alignment, along with automatic amplitude control to ensure efficient energy use.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hierarchical tree-driven grid is used for clock distribution, then clock signal can be distributed across the chip, but clock skew and jitter increase under PVT variation

Engineering Contradiction:
Improveclock skew and jitterVSAvoidPVT variation tolerance
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The chip is divided into multiple clock domains, each with its own resonant oscillator. This segmentation allows each domain to independently maintain clock signal integrity, reducing the impact of PVT variations on the entire clock distribution system.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Resonant oscillators are tuned to resonate at the clock signal frequency, creating a frequency-selective response that naturally rejects noise and variations. The resonant frequency is carefully designed to match the desired clock frequency, providing robustness against PVT changes.

Inventive Principle:
Principle #35Parameter changes

2Loss of energy

If standing-wave clock distribution is used, then power is saved through resonance, but non-uniform clock amplitude results in skew or complex buffering

Engineering Contradiction:
Improvepower consumptionVSAvoidclock amplitude uniformity
Core Design Contradiction:
Loss of energyVSManufacturing precision

Solution Approach 1:

Each clock domain has its own resonant oscillator that locally generates and maintains uniform clock amplitude. This local quality control eliminates the non-uniform amplitude propagation issue in standing-wave distributions while retaining the power-saving resonance effect.

Inventive Principle:
Principle #3Local quality

3Reliability

If traveling-wave clock distribution is used, then clock skew and jitter are reduced with resonance power advantage, but non-uniform phase across distribution complicates integration

Engineering Contradiction:
Improveclock skew and jitterVSAvoidintegration complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The clock distribution is segmented into independent domains, each with uniform phase reference from its own resonant oscillator. This eliminates the non-uniform phase accumulation problem in traveling-wave distributions while maintaining low skew and jitter within each domain.

Inventive Principle:
Principle #1Segmentation

4Length of moving object

If oscillator array clocks are used, then distance between clock source and load is reduced, but non-uniform phase, amplitude, and complex synchronization are required

Engineering Contradiction:
Improveclock signal distribution distanceVSAvoidsynchronization complexity
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

Each resonant oscillator autonomously maintains its own phase and amplitude through resonance, eliminating the need for complex external synchronization mechanisms. The oscillators self-regulate to maintain uniform characteristics without requiring phase detectors or complex control circuits.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The system effectively reduces clock skew and jitter, maintains resonance across the chip, and integrates well with existing local clocking methodologies by ensuring uniform phase and amplitude, thereby enhancing the reliability and efficiency of clock signal distribution.

Implementation Method 1

the inductances of the inductors are configured such that a resonant frequency of the plurality of resonant oscillators is substantially equal to the frequency of the clock signal

Methodology Applied
Scientific EffectResonance: Resonance

Implementation Method 2

Each resonant oscillator comprises an inductor with an inductance such that a resonant frequency of the plurality of resonant oscillators is substantially equal to the frequency of the clock signal

Methodology Applied
Scientific EffectEnergy storage in inductor: Inductor

Data Source

PatentUS7880551B2Systems and methods for distributing a clock signal
Publication Date: 2011.02.01 THE TRUSTEES OF COLUMBIA UNIV IN THE CITY OF NEW YORK
  • US7880551B2 patent drawing
  • US7880551B2 patent drawing
  • US7880551B2 patent drawing

AI summary

Systems and methods for distributing a clock signal are disclosed. In some embodiments, systems for distributing a clock signal include a plurality of resonant oscillators, each comprising an inductor; and a differential clock grid that distributes the clock signal. The differential clock grid is coupled to the plurality of resonant oscillators and the clock signal, and the inductances of the inductors are configured such that a resonant frequency of the plurality of resonant oscillators is substantially equal to the frequency of the clock signal.